# A Note on Mask Registers

DevFeed: [A Note on Mask Registers](<https://devfeed.tech/articles/a-note-on-mask-registers-28482.md>)

Original publisher: [Read original article](<https://travisdowns.github.io/blog/2019/12/05/kreg-facts.html>)

Author: Travis Downs (travis.downs@gmail.com)

Published: 2019-12-05T16:30:00Z

Content type: article

Language: en

Sources: [Performance Matters](<https://devfeed.tech/sources/performance-matters.md>)

Topics: [Hardware](<https://devfeed.tech/topics/hardware.md>), [cpu](<https://devfeed.tech/topics/cpu.md>), [intel](<https://devfeed.tech/topics/intel.md>), [Cache](<https://devfeed.tech/topics/cache.md>)

Tags: [architecture](<https://devfeed.tech/tags/architecture.md>), [avx](<https://devfeed.tech/tags/avx.md>), [blog](<https://devfeed.tech/tags/blog.md>), [c-plus-plus](<https://devfeed.tech/tags/c-plus-plus.md>), [cache](<https://devfeed.tech/tags/cache.md>), [cpu](<https://devfeed.tech/tags/cpu.md>), [execution](<https://devfeed.tech/tags/execution.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [intel](<https://devfeed.tech/tags/intel.md>), [performance](<https://devfeed.tech/tags/performance.md>), [uarch](<https://devfeed.tech/tags/uarch.md>)

## AI overview

This article examines AVX-512 mask registers and investigates the size of their physical register file using an updated out-of-order CPU resource probing tool. It explains zero-masking and merging behavior and introduces a method based on measuring whether cache-miss loads execute in parallel.

## Source excerpt

Some mostly too-low-level-to-care-about hardware details of the mask registers introduced in AVX-512.