# NVIDIA Nemotron 3 Ultra Leads Open Models on Accuracy and Efficiency in Agentic RTL Coding

DevFeed: [NVIDIA Nemotron 3 Ultra Leads Open Models on Accuracy and Efficiency in Agentic RTL Coding](<https://devfeed.tech/articles/nvidia-nemotron-3-ultra-leads-open-models-on-accuracy-and-efficiency-in-agentic-rtl-coding-6901.md>)

Original publisher: [Read original article](<https://developer.nvidia.com/blog/nvidia-nemotron-3-ultra-leads-open-models-on-accuracy-and-efficiency-in-agentic-rtl-coding/>)

Author: Nirmal Kumar Juluru

Published: 2026-07-27T00:45:00Z

Content type: article

Language: en

Sources: [NVIDIA Developer](<https://devfeed.tech/sources/nvidia-developer.md>), [NVIDIA Technical Blog](<https://devfeed.tech/sources/nvidia-technical-blog.md>)

Topics: [coding](<https://devfeed.tech/topics/coding.md>), [Verilog](<https://devfeed.tech/topics/verilog.md>), [AI-assisted coding](<https://devfeed.tech/topics/ai-assisted-coding.md>), [Nvidia](<https://devfeed.tech/topics/nvidia.md>), [Artificial Intelligence](<https://devfeed.tech/topics/ai.md>), [debugging](<https://devfeed.tech/topics/debugging.md>), [Benchmark](<https://devfeed.tech/topics/benchmark.md>), [Code generation](<https://devfeed.tech/topics/code-generation.md>), [Hardware](<https://devfeed.tech/topics/hardware.md>), [long-context](<https://devfeed.tech/topics/long-context.md>)

Tags: [agentic](<https://devfeed.tech/tags/agentic.md>), [agentic-ai-generative-ai](<https://devfeed.tech/tags/agentic-ai-generative-ai.md>), [ai](<https://devfeed.tech/tags/ai.md>), [ai-agent](<https://devfeed.tech/tags/ai-agent.md>), [ai-agents](<https://devfeed.tech/tags/ai-agents.md>), [automation](<https://devfeed.tech/tags/automation.md>), [benchmark](<https://devfeed.tech/tags/benchmark.md>), [chip-design](<https://devfeed.tech/tags/chip-design.md>), [code](<https://devfeed.tech/tags/code.md>), [code-generation](<https://devfeed.tech/tags/code-generation.md>), [coding](<https://devfeed.tech/tags/coding.md>), [debugging](<https://devfeed.tech/tags/debugging.md>), [developer-tools-techniques](<https://devfeed.tech/tags/developer-tools-techniques.md>), [efficiency](<https://devfeed.tech/tags/efficiency.md>), [engineering](<https://devfeed.tech/tags/engineering.md>), [featured](<https://devfeed.tech/tags/featured.md>), [hardware-semiconductor](<https://devfeed.tech/tags/hardware-semiconductor.md>), [llms](<https://devfeed.tech/tags/llms.md>), [long-context](<https://devfeed.tech/tags/long-context.md>), [models](<https://devfeed.tech/tags/models.md>), [nemotron](<https://devfeed.tech/tags/nemotron.md>), [nvidia](<https://devfeed.tech/tags/nvidia.md>), [open](<https://devfeed.tech/tags/open.md>), [reasoning](<https://devfeed.tech/tags/reasoning.md>), [top-stories](<https://devfeed.tech/tags/top-stories.md>), [validation](<https://devfeed.tech/tags/validation.md>)

## AI overview

NVIDIA's article presents ACE-RTL and Nemotron 3 Ultra as a combined approach to agentic RTL coding. The workflow generates Verilog, runs simulations and other EDA checks, analyzes failures, and iteratively refines designs while maintaining debugging context. The CVDP benchmark evaluates accuracy and efficiency on realistic RTL generation, modification, debugging, and verification tasks.

## Source excerpt

Modern chip design is increasingly limited by engineering time. Register transfer level (RTL) development and verification require specialized hardware...