# 2D mesh

Published articles for 2D mesh.

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## Unified Chiplet Network Scales Neuromorphic Computing Systems (Heidelberg University)

DevFeed: [Unified Chiplet Network Scales Neuromorphic Computing Systems (Heidelberg University)](<https://devfeed.tech/articles/unified-chiplet-network-scales-neuromorphic-computing-systems-heidelberg-university-55474.md>)

Original publisher: [Read original article](<https://semiengineering.com/unified-chiplet-network-scales-neuromorphic-computing-systems-heidelberg-university/>)

Author: Technical Paper Link

Published: 2026-09-19T18:23:56Z

Content type: article

Language: en

Sources: [Semiconductor Engineering](<https://devfeed.tech/sources/semiconductor-engineering.md>)

Topics: [Computing](<https://devfeed.tech/topics/computing.md>), [Scalability](<https://devfeed.tech/topics/scalability.md>), [systems](<https://devfeed.tech/topics/systems.md>), [Network](<https://devfeed.tech/topics/network.md>)

Tags: [2026](<https://devfeed.tech/tags/2026.md>), [2d-mesh](<https://devfeed.tech/tags/2d-mesh.md>), [ai-ml-dl](<https://devfeed.tech/tags/ai-ml-dl.md>), [analog](<https://devfeed.tech/tags/analog.md>), [architecture](<https://devfeed.tech/tags/architecture.md>), [architectures](<https://devfeed.tech/tags/architectures.md>), [arq](<https://devfeed.tech/tags/arq.md>), [automatic-repeat-request](<https://devfeed.tech/tags/automatic-repeat-request.md>), [brainscales](<https://devfeed.tech/tags/brainscales.md>), [brainscales-2](<https://devfeed.tech/tags/brainscales-2.md>), [chiplet-interconnects](<https://devfeed.tech/tags/chiplet-interconnects.md>), [chiplets](<https://devfeed.tech/tags/chiplets.md>), [computing](<https://devfeed.tech/tags/computing.md>), [cost](<https://devfeed.tech/tags/cost.md>), [credit-based-flow-control](<https://devfeed.tech/tags/credit-based-flow-control.md>), [data](<https://devfeed.tech/tags/data.md>), [data-movement](<https://devfeed.tech/tags/data-movement.md>), [die-to-die-communication](<https://devfeed.tech/tags/die-to-die-communication.md>), [engineering](<https://devfeed.tech/tags/engineering.md>), [error-control](<https://devfeed.tech/tags/error-control.md>), [flexibility](<https://devfeed.tech/tags/flexibility.md>), [heidelberg-university](<https://devfeed.tech/tags/heidelberg-university.md>), [implementing](<https://devfeed.tech/tags/implementing.md>), [mixed-signal-circuits](<https://devfeed.tech/tags/mixed-signal-circuits.md>), [network](<https://devfeed.tech/tags/network.md>), [neuromorphic](<https://devfeed.tech/tags/neuromorphic.md>), [neuromorphic-computing](<https://devfeed.tech/tags/neuromorphic-computing.md>), [packaging](<https://devfeed.tech/tags/packaging.md>), [paper](<https://devfeed.tech/tags/paper.md>), [routing-chiplets](<https://devfeed.tech/tags/routing-chiplets.md>), [scaling](<https://devfeed.tech/tags/scaling.md>), [semiconductor](<https://devfeed.tech/tags/semiconductor.md>), [snn](<https://devfeed.tech/tags/snn.md>), [spiking-neural-networks](<https://devfeed.tech/tags/spiking-neural-networks.md>), [system](<https://devfeed.tech/tags/system.md>), [systems](<https://devfeed.tech/tags/systems.md>), [technical-papers](<https://devfeed.tech/tags/technical-papers.md>)

### AI overview

Researchers at Heidelberg University describe a unified interconnection network for scaling the BrainScaleS-2 neuromorphic system with chiplet-based designs. The proposed routing chiplet connects multiple units in a 2D mesh and handles both error-tolerant spike traffic and error-intolerant configuration and processing-unit data.

### Source excerpt

Researchers at Heidelberg University published a technical paper titled "A Unified Interconnection Network for Chiplet-Based Scaling of the BrainScaleS Neuromorphic System." Abstract Excerpt: "To overcome the challenges of scaling analog designs, chiplet-based designs offer a promising approach with cost and flexibility advantages over monolithic scaling. Implementing a chiplet-based BSS-2* architecture requires an interconnection network that... " read more The post Unified Chiplet Network Scales Neuromorphic Computing Systems (Heidelberg University) appeared first on Semiconductor Engineering.