# 400G Published articles for 400G. This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles. ## More 100G in every rack: Meet the Cisco N9348C8D-H2 DevFeed: [More 100G in every rack: Meet the Cisco N9348C8D-H2]() Original publisher: [Read original article]() Author: Adhiraj Lahiri Published: 2026-11-04T16:00:25Z Content type: article Language: en Sources: [Cisco Blogs]() Topics: [Cisco](), [Network architectures](), [cloud-infrastructure](), [observability](), [High-Performance Computing]() Tags: [25g](), [400g](), [aci](), [ai](), [airflow](), [apic](), [architecture](), [asic](), [buffer](), [capacity](), [choice](), [cisco](), [cisco-live](), [cisco-live-melbourne](), [cisco-nexus](), [cisco-nexus-dashboard](), [classification](), [cloud-environments](), [data-center](), [data-center-networking](), [leaf-switch](), [software](), [switch]() ### AI overview The Cisco N9348C8D-H2 packs 48 flexible 100G SFP-DD ports and eight 400G QSFP-DD uplinks into a fixed 1RU switch, addressing demand for dense leaf capacity alongside faster spine links. Its SFP-DD ports support 10G, 25G, 50G, and 100G, with supported breakouts to two 50G SFP56 endpoints; the uplinks support up to 400G and can break out to four 100G QSFP28 endpoints. The switch delivers up to 8 Tbps of forwarding capacity and supports either NX-OS or ACI, managed through Nexus Dashboard or APIC in the corresponding environment. Telemetry options include flow telemetry, flow table events, and streaming statistics export; PTP, reversible airflow, and AC or DC power options support varied operations and facilities. The source presents it as a platform for new 100G fabrics or transitions from slower access speeds. ### Source excerpt See how the Cisco N9348C8D-H2 combines dense 100G ports, 400G uplinks, and software choice in a compact 1RU leaf switch. ## Using AI to re-architect the Cisco DevNet sandbox environment - Part 1 DevFeed: [Using AI to re-architect the Cisco DevNet sandbox environment - Part 1]() Original publisher: [Read original article]() Author: Adrian Iliesiu Published: 2026-10-22T19:00:34Z Content type: article Language: en Sources: [Cisco Blogs]() Topics: [IP routing](), [Artificial Intelligence]() Tags: [25g](), [400g](), [agentic-ai](), [aggregation](), [ai](), [ai-agent](), [ai-for-networking](), [architect](), [architecture](), [bgp](), [bgp-evpn](), [border](), [cabling](), [cisco](), [cisco-devnet](), [cisco-nexus](), [design](), [devnet](), [devnet-sandbox](), [fabric](), [network](), [network-design](), [routers](), [sandbox](), [vpc]() ### AI overview Claude's topology review led the author to replace a planned spine-leaf fabric with a two-tier vPC design and keep two routers as spares. It first flagged that the routers should connect through border leaves because spines in the described design connect only to leaves; direct router-to-spine links also mismatched the C8475-G2's 25G ports with the 93600's QSFP ports. After clarifying that the routers would not run BGP and that classic VLANs had to span multiple leaves, the author concluded the fabric needed a two-tier vPC design, not a routed-access Clos: classic VLANs would not span a routed spine-leaf fabric without an overlay. The article also says Nexus switches can route inter-VLAN traffic in hardware at line rate, while the 8400 Series routers top out at roughly 91 Gbps, making them a poor place for fabric gateways. The author recommends sharing the full design for review, checking hardware claims, and answering requirements questions precisely. ### Source excerpt An AI agent reviewed our sandbox network design, caught routers hanging off the spines, and asked one question that turned a Clos fabric into a two-tier vPC design. ## CoreWeave Expands its NVIDIA Blackwell Fleet with Generally Available NVIDIA HGX B200 Instances DevFeed: [CoreWeave Expands its NVIDIA Blackwell Fleet with Generally Available NVIDIA HGX B200 Instances]() Original publisher: [Read original article]() Author: CoreWeave Published: 2026-10-22T16:27:39Z Content type: release Language: en Sources: [Coreweave Blog Posts]() Topics: [NVIDIA Blackwell](), [AI Infrastructure](), [Nvidia](), [NVLink](), [Hopper]() Tags: [2](), [2025](), [400g](), [accelerate](), [accelerated](), [adapters](), [addition](), [ai](), [ai-cloud](), [ai-infrastructure](), [announce](), [availability](), [based](), [blackwell](), [content-type](), [coreweave](), [general](), [general-availability](), [nvidia](), [nvidia-blackwell](), [with]() ### AI overview CoreWeave announced general availability of HGX B200 instances in the US-WEST-01A zone under instance ID b200-8x. Each instance has eight B200 GPUs with 180 GB HBM3e each, two Intel Emerald Rapids CPUs, 61.44 TB of local NVMe storage, and 400G NDR Quantum-2 InfiniBand networking. The article claims up to 2x performance per GPU versus Hopper, including up to 15x faster inference on GPT-MoE-1.8T and 3x faster H100-based training. CoreWeave says its SUNK Slurm/Kubernetes integration can share cluster resources between training and serving, while topology-aware scheduling targets GPU interconnect and data locality; CKS provides managed Kubernetes on bare metal. Private VPCs and dedicated BlueField DPUs support isolation and offload, and Observe and Mission Control provide GPU metrics and operational monitoring. Performance figures are vendor claims in the supplied text. ### Source excerpt Today we announce the expansion of our NVIDIA Blackwell-based instances with the general availability of NVIDIA HGX B200-based instances on CoreWeave ## SONiC momentum continues at OCP Global Summit DevFeed: [SONiC momentum continues at OCP Global Summit]() Original publisher: [Read original article]() Author: Michael Cooney Published: 2026-10-21T01:25:34Z Content type: news Language: en Sources: [Network World]() Topics: [AI Infrastructure](), [Cisco](), [NVIDIA Spectrum-X Ethernet](), [rdma](), [evpn](), [observability]() Tags: [2026](), [400g](), [ai](), [ai-networking](), [architecture](), [artificial-intelligence](), [artificial-intelligence-network-switches-networking](), [azure](), [bgp](), [cisco](), [data-center](), [edition-us](), [ethernet](), [google-cloud](), [hardware](), [hyperscale](), [hyperscalers](), [language-en](), [linux](), [microsoft](), [network-switches](), [networking](), [nokia](), [ocp](), [sonic](), [storytype-news](), [summit]() ### AI overview SONiC's OCP Summit momentum centered on broader hardware support, faster route programming, and community growth for AI and cloud fabrics. Cisco says its validated SONiC runs on N9000 switches with Cloud Scale silicon and on N9100 switches with Nvidia Spectrum-X, with Silicon One support planned for N9000; Cisco presents this as extending its multi-silicon Nexus portfolio and enabling a shared support and routing-tool model alongside its 8000 Series. Microsoft and Nokia described community work to speed route programming and recovery after route changes, which can matter in large routing tables and AI fabrics. The SONiC Foundation added Lenovo, NADDOD, and NEXAI, which plan contributions in areas including automation, SAI, RDMA/RoCE, telemetry, and observability. The excerpt also describes SONiC as a Linux network OS that runs across vendors' switches and supports BGP, RDMA, QoS, and Ethernet/IP; AI use is described as concentrated largely in hyperscale environments. ### Source excerpt Proponents of SONiC made a strong showing at last week's Open Compute Project (OCP) Global Summit, where vendors including Cisco, Microsoft, and Nokia championed SONiC's capabilities as an open Ethernet platform for AI networking. The Linux-based network operating system decouples network software from the underlying hardware and allows it to run on hundreds of switches and ASICs from multiple vendors. SONiC (which stands for Software for Open Networking in the Cloud) supports a full suite of network features, including Border Gateway Protocol (BGP), remote direct memory access (RDMA), QoS, and Ethernet/IP. SONiC's modularity, programmability, and cloud-based architecture make it a viable option for enterprises and hyperscalers to deploy as a traditional networking base. And increasingly, it's being used for AI networking, largely in hyperscale environments. The 650 Group forecasts that SONiC-based data center switching revenue will surge past $5 billion in 2026, driven by hyperscalers like Microsoft Azure and Google Cloud along with growth in community-hardened architecture for the neoclouds and enterprise. With that in mind, here's some of the SONiC-related news from OCP Global Summit: Extending Cisco-validated SONiC Cisco announced that its Cisco-validated SONiC is available on its N9000 Series with Cisco Cloud Scale silicon for high-density 100G and 400G enterprise and web-scale leaf-spine tiers, and on the Cisco N9100 Series with Nvidia Spectrum-X ASICs for high-throughput, loss-sensitive backend AI fabrics. The vendor also said it is extending its SONiC offering to the Cisco Silicon One ASIC-powered N9000 Series for ultra-high-density fabrics. Cisco already supports SONiC on its fixed and modular 8000 Series routers. This will complete SONiC integration across the Cisco multi-silicon Nexus switching portfolio, according to a blog post by Surbhi Paul, director, product management, for data center AI networking at Cisco. "For organizations deploying Cisco 8000 S ## Meta Prometheus: Inside the Gigawatt Supercluster Scaling to 1 Million GPUs on GB200 and GB300 NVL72 DevFeed: [Meta Prometheus: Inside the Gigawatt Supercluster Scaling to 1 Million GPUs on GB200 and GB300 NVL72]() Original publisher: [Read original article]() Author: Brian Beeler Published: 2026-10-19T16:17:27Z Content type: news Language: en Sources: [StorageReview.com]() Topics: [Distributed Systems & Parallel Computing](), [GB300 NVL72](), [GB200](), [Cloud Architecture](), [Vera Rubin NVL72](), [CI/CD]() Tags: [400g](), [51-2t](), [accelerators](), [ai](), [architecture](), [asic](), [can](), [complete](), [enterprise](), [foundation](), [foundation-models](), [gb200](), [gb300](), [gb300-nvl72](), [gpus](), [inside](), [meta](), [muse-wonder](), [nvl72](), [published](), [scaling]() ### AI overview Meta's Prometheus AI supercluster in Ohio is expanding toward roughly one million GPUs. The article details its GB200 and GB300 systems, multi-building Ethernet network, GPU spares and checkpoint recovery, reliability improvements, firmware automation, power management, and cooling infrastructure. Meta reports that interruptions fell by 99 percent from their mid-2025 peak after a year of work across the hardware and software stack. ### Source excerpt Meta published a detailed look inside Prometheus today, the gigawatt-scale AI supercluster it is building in New Albany, Ohio. The first phase is complete and has trained the Muse family of foundation models, including the Muse Wonder models, and Meta says the site is being scaled toward roughly 1 million GPUs. Two years ago, the The post Meta Prometheus: Inside the Gigawatt Supercluster Scaling to 1 Million GPUs on GB200 and GB300 NVL72 appeared first on StorageReview.com. ## Inside Prometheus: Meta's Journey to a Gigawatt-Scale Supercluster DevFeed: [Inside Prometheus: Meta's Journey to a Gigawatt-Scale Supercluster]() Original publisher: [Read original article]() Author: Kevin Lee; Yashar Bayani; Ahmed Sharif; Yee Jiun Song Published: 2026-10-19T13:00:10Z Content type: article Language: en Sources: [Engineering at Meta](), [Meta ML Applications]() Topics: [AI Infrastructure](), [NVLink](), [GB200](), [Vera Rubin NVL72](), [clean energy data centers](), [Cloud Architecture]() Tags: [400g](), [51-2t](), [core-infra](), [data-center-engineering](), [data-infrastructure](), [gpus](), [infrastructure](), [meta](), [ml-applications](), [networking-traffic](), [production-engineering](), [prometheus](), [release](), [scale](), [scaling]() ### AI overview Meta describes Prometheus, a gigawatt-scale AI supercluster in New Albany, Ohio, and its plan to expand toward roughly one million GPUs. The article details its GPU platforms, networking, reliability and fault-recovery systems, power management, and liquid-cooling approaches. It reports that engineering changes reduced interruptions by 99% from a peak of nearly 1,000 events per 8K GPUs daily. ### Source excerpt With the recent release of the Muse family of foundational models, we want to take you inside the infrastructure that has made it all possible. The first phase of Prometheus, our gigawatt-scale supercluster, is already complete and we're working toward scaling it to comprise ~1 million GPUs. Prometheus also features technologies like closed-loop liquid cooling [...] Read More... The post Inside Prometheus: Meta's Journey to a Gigawatt-Scale Supercluster appeared first on Engineering at Meta. ## Inside the Secretive AWS Networking Lab DevFeed: [Inside the Secretive AWS Networking Lab]() Original publisher: [Read original article]() Author: Patrick Kennedy Published: 2026-10-14T17:15:44Z Content type: article Language: en Sources: [ServeTheHome]() Topics: [Cryptography](), [Ethernet](), [Amazon VPC]() Tags: [1-6t](), [1-6tbe](), [102-4t](), [400g](), [51-2t](), [ai](), [aws](), [distributed](), [dwdm](), [encryption](), [networking](), [osfp](), [qsfp112]() ### AI overview A tour of AWS's networking lab covers its in-house switches from 3.2 Tbps to 102.4 Tbps, including a 12.8 Tbps model that encrypts traffic on every port. The article also describes a separate timing network that AWS says keeps time within 20 microseconds, plus management switches and related equipment. ### Source excerpt We tour a secretive AWS networking lab to see innovation from management switches up to 102.4T switches, encryption, timing, optics, and more The post Inside the Secretive AWS Networking Lab appeared first on ServeTheHome. ## New USFP Pluggable Optics Form Factor for Higher Speeds from Cisco and NVIDIA DevFeed: [New USFP Pluggable Optics Form Factor for Higher Speeds from Cisco and NVIDIA]() Original publisher: [Read original article]() Author: Patrick Kennedy Published: 2026-10-13T13:00:40Z Content type: news Language: en Sources: [ServeTheHome]() Topics: [Ethernet](), [Cisco](), [Nvidia](), [Nexus Dashboard]() Tags: [400g](), [ai-infrastructure](), [ai-networking](), [cisco](), [custom-silicon](), [ethernet](), [hyperscale](), [infrastructure](), [marvell](), [n9000](), [networking](), [networks](), [nvidia](), [optics](), [pluggable-optics](), [silicon-one]() ### AI overview Cisco and NVIDIA are developing the USFP pluggable optics form factor for 400G SerDes lanes, supporting a path to higher-density 1.6 Tbps Ethernet fabrics. Cisco also outlined Silicon One G300 systems, a G302 top-of-rack switch, and the A100L for lower-cost management switching. The article discusses Cisco SONiC options and Live Protect runtime vulnerability shielding, with availability planned for 2027. ### Source excerpt Cisco and NVIDIA team up announcing a new USFP form factor for 400G SerDes lanes. Cisco also has a few new Silicon One offerings The post New USFP Pluggable Optics Form Factor for Higher Speeds from Cisco and NVIDIA appeared first on ServeTheHome. ## Microsoft Maia 300 Puts 288GB of HBM4 at 18TB/s on an N2P Chiplet and 96 Accelerators in a 167kW Rack DevFeed: [Microsoft Maia 300 Puts 288GB of HBM4 at 18TB/s on an N2P Chiplet and 96 Accelerators in a 167kW Rack]() Original publisher: [Read original article]() Author: Brian Beeler Published: 2026-10-12T19:45:29Z Content type: news Language: en Sources: [StorageReview.com]() Topics: [NVIDIA Vera Rubin](), [Microsoft](), [AI Infrastructure](), [NUMA](), [Beta channel]() Tags: [400g](), [agentic](), [ai](), [architecture](), [bandwidth](), [chiplet](), [chiplets](), [cloud](), [cluster](), [clusters](), [compute](), [configuration](), [data](), [deployments](), [efficiency](), [enterprise](), [inference](), [pairs](), [tsmc]() ### AI overview Microsoft announced Maia 300, its third-generation in-house inference accelerator, built from multiple chiplets with eight HBM4 stacks providing 288GB of memory and 18TB/s of bandwidth. A rack holds 96 accelerators and draws 167kW. The article reports Microsoft's performance and efficiency claims while noting that the comparison lacks details about the GPU, model, and serving configuration, and cannot be independently tested outside Microsoft. ### Source excerpt Microsoft unveiled Azure Maia 300 today at the OCP Global Summit, the third generation of its in-house inference accelerator and the first built as a multi-chiplet part. Each accelerator pairs a TSMC N2P compute die with eight HBM4 stacks for 288GB of memory at 18TB/s inside a 950W TDP, and a Maia 300 rack holds The post Microsoft Maia 300 Puts 288GB of HBM4 at 18TB/s on an N2P Chiplet and 96 Accelerators in a 167kW Rack appeared first on StorageReview.com. ## Cisco and NVIDIA Announce USFP: Expanding the Path to AI Connectivity DevFeed: [Cisco and NVIDIA Announce USFP: Expanding the Path to AI Connectivity]() Original publisher: [Read original article]() Author: Bill Gartner Published: 2026-10-12T15:00:19Z Content type: news Language: en Sources: [Cisco Blogs]() Topics: [AI Infrastructure](), [NVLink](), [Cisco](), [Nvidia](), [NVIDIA Spectrum-X Ethernet]() Tags: [400g](), [accelerators](), [adoption](), [ai](), [ai-infrastructure](), [ai-networking](), [ai-workloads](), [announce](), [cisco](), [cisco-ai-networking](), [cisco-optical-networking](), [data-center](), [data-center-networking](), [data-centers](), [ethernet](), [executive-platform](), [infrastructure](), [nvidia](), [ocp](), [scale]() ### AI overview Cisco and NVIDIA announce design plans for USFP, a pluggable form factor intended for next-generation AI Ethernet fabrics. Its 16 lanes can operate at 400 Gb/s per lane for 6.4T aggregate capacity, with a 32-lane path to 12.8T. The article says the design aims to preserve familiar deployment, serviceability, and interoperability while improving bandwidth density and power efficiency. ### Source excerpt Cisco and NVIDIA announce USFP, the first 400G-per-lane pluggable form factor. Scale your AI infrastructure efficiently while keeping the proven operations you trust. ## Scaling open networking through Cisco-validated SONiC on N9000 DevFeed: [Scaling open networking through Cisco-validated SONiC on N9000]() Original publisher: [Read original article]() Author: Surbhi Paul Published: 2026-10-06T15:00:09Z Content type: article Language: en Sources: [Cisco Blogs]() Topics: [Cisco](), [RIOT](), [cisco networking](), [NVIDIA Spectrum-X Ethernet](), [Nexus Dashboard](), [Kubernetes]() Tags: [2026](), [400g](), [ai-infrastructure](), [ai-networking](), [cisco](), [cloudscale](), [cost](), [data-center](), [n9000](), [networking](), [nexus-one](), [ocp](), [open-source](), [reliability](), [scaling](), [silicon-one](), [software-for-open-networking-in-the-cloud-sonic](), [sonic]() ### AI overview The article presents Cisco-validated SONiC on Cisco N9000 switches as an open networking option that combines the flexibility of an open-source network operating system with Cisco hardware validation, security hardening, and support. It argues this model can reduce the operational burden of building and maintaining custom SONiC deployments, and describes use cases spanning AI fabrics, web-scale networks, and enterprise data centers. ### Source excerpt Open networking delivers strategic value, but DIY disaggregation adds risk and hidden cost. Cisco-validated SONiC on the N9000 combines open-source agility with proven Cisco reliability and global support. ## DGX Station GB300 Cluster: Two Towers, Two 400G DACs, and Frontier Models Without the Offload Penalty DevFeed: [DGX Station GB300 Cluster: Two Towers, Two 400G DACs, and Frontier Models Without the Offload Penalty]() Original publisher: [Read original article]() Author: Brian Beeler Published: 2026-10-05T17:16:42Z Content type: article Language: en Sources: [StorageReview.com]() Topics: [AI Infrastructure](), [NVIDIA DGX](), [async]() Tags: [400g](), [ai-workloads](), [concurrency](), [connectx](), [consumer](), [dgx-station](), [end-user](), [models](), [workstation]() ### AI overview StorageReview tests two NVIDIA GB300 DGX Stations connected by dual 400G links for distributed AI inference. The article reports near line-rate networking and compares tensor parallelism with prefill/decode disaggregation across several models. The largest gains occur when splitting models that exceed one Station's HBM capacity; models that fit also benefit from assigning separate systems to prefill and decode. ### Source excerpt We've taken a look at a couple of GB300 DGX Stations now, and recently had two of them physically in our lab at the same time: the ASUS ExpertCenter Pro ET900N G3 and the HP ZGX Fury AI Station. With both towers sitting next to each other, we wanted to connect them and see what The post DGX Station GB300 Cluster: Two Towers, Two 400G DACs, and Frontier Models Without the Offload Penalty appeared first on StorageReview.com. ## NetBox 4.7 is GA: Cooling Joins the Power Model DevFeed: [NetBox 4.7 is GA: Cooling Joins the Power Model]() Original publisher: [Read original article]() Author: Mark Coleman Published: 2026-09-03T16:22:26Z Content type: release Language: en Sources: [NetBox Labs]() Topics: [NetBox](), [Cloud and systems](), [NetBox Plugin]() Tags: [400g](), [archive](), [automation](), [blog](), [cooling](), [database](), [device](), [devices](), [django](), [gpu](), [hardware](), [infrastructure](), [install](), [installation](), [maintenance-window](), [migration](), [netbox](), [power]() ### AI overview NetBox 4.7 adds a modeled cooling system that tracks cooling sources, feeds, device intakes and outflows, and rack capabilities. The release also adds native channelized interfaces, module bay compatibility checks and relocation, hardware end-of-life dates, and changes aimed at sustained automation writes. PostgreSQL 15+ and Redis 6.0+ are required; a database migration may block reads and writes for several minutes on large databases. ### Source excerpt The post NetBox 4.7 is GA: Cooling Joins the Power Model appeared first on NetBox Labs. ## Hot Chips 2026: SN50 RDU Dataflow at Scale DevFeed: [Hot Chips 2026: SN50 RDU Dataflow at Scale]() Original publisher: [Read original article]() Author: Raghu Prabhakar, Chief Architect, SambaNova Published: 2026-09-02T19:33:06Z Content type: article Language: en Sources: [Sambanova]() Topics: [Service fabric](), [AWS AI chips](), [NVLink]() Tags: [400g](), [ai](), [blog](), [chips](), [scale](), [technology]() ### AI overview SambaNova's Hot Chips 2026 presentation describes the SN50 RDU architecture for AI inference, focusing on decode bandwidth utilization, dataflow execution, and scale-up and scale-out Ethernet fabrics. SambaNova reports decode taking 75% to 97% of inference time across six analyzed configurations and models DeepSeek-R1 per-user throughput increasing from 200 to 500 tokens per second as the system grows from 64 to 256 RDUs, with modeled MBU between 44% and 51%. The throughput figures are modeled operating points, not production measurements. ### Source excerpt At Hot Chips 2026, the industry converged on a new bottleneck: AI is moving from one-shot answers to agents that reason, call tools, and keep working. That means far more generated tokens, and far more time spent in decode. ## Multi-Core Fiber: Several Optical Cores Inside One Strand DevFeed: [Multi-Core Fiber: Several Optical Cores Inside One Strand]() Original publisher: [Read original article]() Author: j2sw Published: 2026-08-18T13:39:00Z Content type: tutorial Language: en Sources: [Justin Wilson (j2sw)]() Topics: [Hardware](), [Network](), [interface]() Tags: [400g](), [cabling](), [channel](), [connectors](), [data-center](), [fiber](), [fiber-optics](), [internet-architecture](), [multi-core-fiber](), [network-engineering-resources](), [networks](), [optical-networking](), [optics](), [space-division-multiplexing](), [transmission]() ### AI overview This article explains how multi-core fiber places several optical cores inside one standard 125-micron cladding. It distinguishes MCF from high-fiber-count cable, describes aggregate capacity using separate channels and space-division multiplexing, and explains the need for specialized optical interfaces, connectors, splicing, and testing. ### Source excerpt Multi-core fiber places several independent optical cores inside one standard 125-micron cladding. It increases channel density, but it also requires different connectors, splicing methods, and testing procedures. The post Multi-Core Fiber: Several Optical Cores Inside One Strand appeared first on Justin Wilson (j2sw). ## Multi-Core Fiber and How It Is Used in Data Centers DevFeed: [Multi-Core Fiber and How It Is Used in Data Centers]() Original publisher: [Read original article]() Author: j2sw Published: 2026-08-12T14:27:20Z Content type: tutorial Language: en Sources: [Justin Wilson (j2sw)]() Topics: [data centers]() Tags: [400g](), [cabling](), [connectors](), [data-center](), [data-centers](), [fiber](), [fiber-optics](), [it-operations](), [mpo](), [mtp](), [multi-core-fiber](), [network-engineering-resources](), [optics](), [panel](), [parallel](), [single-mode](), [structured-cabling]() ### AI overview This article explains how "multi-core fiber" is used in data center discussions, distinguishing multi-fiber or high-fiber-count cables from true multicore fiber. It covers cable construction, fiber counts, single-mode and multimode options, and MPO and MTP connectors. ### Source excerpt If you work around data centers and high-density builds, you have probably heard the term "Multi-Core Fiber" thrown around. People use it in a few different ways. Sometimes, it means a new fiber trunk that comes into a cabinet as a single cable and breaks out into dozens or even hundreds of fibers. That setup ... Read more The post Multi-Core Fiber and How It Is Used in Data Centers appeared first on Justin Wilson (j2sw). ## Fat Rail vs Thin Rail in AI compute clusters DevFeed: [Fat Rail vs Thin Rail in AI compute clusters]() Original publisher: [Read original article]() Author: j2sw Published: 2026-07-01T07:30:18Z Content type: tutorial Language: en Sources: [Justin Wilson (j2sw)]() Topics: [Artificial Intelligence](), [Job](), [dataset]() Tags: [400g](), [ai](), [cluster](), [clusters](), [compute](), [data](), [fabric](), [fat-rail](), [internet-architecture](), [switching](), [thin-rail]() ### AI overview The article explains "fat" and "thin" rails in AI compute clusters. The terms describe whether a node's connection to the fabric provides sufficient bandwidth for the workload, with the practical distinction determined by node-to-node traffic rather than cable count alone. ### Source excerpt We are starting to hear about "Thin" and "Fat" rails in AI fabrics. These are just another way to say a connection from compute into the Fabric. The link either has sufficient capacity (Fat) or insufficient capacity (Thin). A thin rail provides the node with a single path into the fabric. That may be one ... Read more The post Fat Rail vs Thin Rail in AI compute clusters appeared first on Justin Wilson (j2sw).