# A10

Published articles for A10.

This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles.

## Comparing A7 CFET and A10 Nanosheet FETs From Parasitics to Chip Reliability (TUM, UNIMORE, Applied Materials)

DevFeed: [Comparing A7 CFET and A10 Nanosheet FETs From Parasitics to Chip Reliability (TUM, UNIMORE, Applied Materials)](<https://devfeed.tech/articles/comparing-a7-cfet-and-a10-nanosheet-fets-from-parasitics-to-chip-reliability-tum-unimore-applied-materials-60256.md>)

Original publisher: [Read original article](<https://semiengineering.com/comparing-a7-cfet-and-a10-nanosheet-fets-from-parasitics-to-chip-reliability-tum-unimore-applied-materials/>)

Author: Technical Paper Link

Published: 2026-09-25T22:29:43Z

Content type: article

Language: en

Sources: [Semiconductor Engineering](<https://devfeed.tech/sources/semiconductor-engineering.md>)

Topics: [Simulation and Design](<https://devfeed.tech/topics/simulation-and-design.md>), [implementation](<https://devfeed.tech/topics/implementation.md>), [3D](<https://devfeed.tech/topics/3d.md>), [Artificial Intelligence](<https://devfeed.tech/topics/ai.md>)

Tags: [2026](<https://devfeed.tech/tags/2026.md>), [a10](<https://devfeed.tech/tags/a10.md>), [a7](<https://devfeed.tech/tags/a7.md>), [advanced-process-nodes](<https://devfeed.tech/tags/advanced-process-nodes.md>), [aging](<https://devfeed.tech/tags/aging.md>), [ai-accelerator](<https://devfeed.tech/tags/ai-accelerator.md>), [ai-accelerators](<https://devfeed.tech/tags/ai-accelerators.md>), [applied-materials](<https://devfeed.tech/tags/applied-materials.md>), [bias-temperature-instability](<https://devfeed.tech/tags/bias-temperature-instability.md>), [bti](<https://devfeed.tech/tags/bti.md>), [cfet](<https://devfeed.tech/tags/cfet.md>), [chip](<https://devfeed.tech/tags/chip.md>), [complementary-fet](<https://devfeed.tech/tags/complementary-fet.md>), [design-verification](<https://devfeed.tech/tags/design-verification.md>), [engineering](<https://devfeed.tech/tags/engineering.md>), [gaa](<https://devfeed.tech/tags/gaa.md>), [gate-all-around](<https://devfeed.tech/tags/gate-all-around.md>), [materials](<https://devfeed.tech/tags/materials.md>), [multiphysics](<https://devfeed.tech/tags/multiphysics.md>), [nanosheet-fet](<https://devfeed.tech/tags/nanosheet-fet.md>), [nsfet](<https://devfeed.tech/tags/nsfet.md>), [paper](<https://devfeed.tech/tags/paper.md>), [parasitic-capacitance](<https://devfeed.tech/tags/parasitic-capacitance.md>), [parasitic-resistance](<https://devfeed.tech/tags/parasitic-resistance.md>), [physics](<https://devfeed.tech/tags/physics.md>), [power-performance](<https://devfeed.tech/tags/power-performance.md>), [reliability](<https://devfeed.tech/tags/reliability.md>), [rtl](<https://devfeed.tech/tags/rtl.md>), [rtl-to-gds](<https://devfeed.tech/tags/rtl-to-gds.md>), [semiconductor](<https://devfeed.tech/tags/semiconductor.md>), [standard-cell](<https://devfeed.tech/tags/standard-cell.md>), [standard-cells](<https://devfeed.tech/tags/standard-cells.md>), [stco](<https://devfeed.tech/tags/stco.md>), [technical-papers](<https://devfeed.tech/tags/technical-papers.md>), [technical-university-of-munich](<https://devfeed.tech/tags/technical-university-of-munich.md>), [thermal-analysis](<https://devfeed.tech/tags/thermal-analysis.md>), [transistor-scaling](<https://devfeed.tech/tags/transistor-scaling.md>), [transistors](<https://devfeed.tech/tags/transistors.md>), [university-of-modena-and-reggio-emilia](<https://devfeed.tech/tags/university-of-modena-and-reggio-emilia.md>)

### AI overview

A technical paper compares A7 CFET and A10 NSFET technologies using a physics-based system-technology co-evaluation flow. The analysis covers parasitic RC extraction, standard-cell generation, RTL-to-GDS implementation for an AI accelerator, thermal behavior, and BTI aging.

### Source excerpt

Researchers at the TU Munich, University of Modena and Reggio Emilia, and Applied Materials published a technical paper titled "System-Technology Co-Evaluation of A7 CFET and A10 NSFET Technologies from Cell Parasitics to Chip Reliability." Abstract Excerpt: " In this work, we present a physics-based thermal- and aging-aware system-technology co-evaluation (STCO) flow to assess parasitic RCs in... " read more The post Comparing A7 CFET and A10 Nanosheet FETs From Parasitics to Chip Reliability (TUM, UNIMORE, Applied Materials) appeared first on Semiconductor Engineering.

## Introducing: L40S GPUs on Modal

DevFeed: [Introducing: L40S GPUs on Modal](<https://devfeed.tech/articles/introducing-l40s-gpus-on-modal-79872.md>)

Original publisher: [Read original article](<https://modal.com/blog/introducing-l40s>)

Author: Modal

Published: 2024-12-19T12:00:00Z

Content type: release

Language: en

Sources: [Modal](<https://devfeed.tech/sources/modal.md>)

Topics: [GPU](<https://devfeed.tech/topics/gpu.md>), [CUDA](<https://devfeed.tech/topics/cuda.md>), [LLM optimization](<https://devfeed.tech/topics/llm-optimization.md>), [flux](<https://devfeed.tech/topics/flux.md>), [PyTorch](<https://devfeed.tech/topics/pytorch.md>)

Tags: [a10](<https://devfeed.tech/tags/a10.md>), [ai-inference](<https://devfeed.tech/tags/ai-inference.md>), [cuda](<https://devfeed.tech/tags/cuda.md>), [flux](<https://devfeed.tech/tags/flux.md>), [gpu](<https://devfeed.tech/tags/gpu.md>), [gpus](<https://devfeed.tech/tags/gpus.md>), [infrastructure](<https://devfeed.tech/tags/infrastructure.md>), [memory](<https://devfeed.tech/tags/memory.md>), [nvidia](<https://devfeed.tech/tags/nvidia.md>), [performance](<https://devfeed.tech/tags/performance.md>), [python](<https://devfeed.tech/tags/python.md>), [python-sdk](<https://devfeed.tech/tags/python-sdk.md>)

### AI overview

Modal has made NVIDIA L40S GPUs available for inference workloads at $1.95 per hour. With 48 GB of memory, the L40S can run larger models than the A10; Modal also reports performance gains across memory-bound and compute-bound jobs and describes how to deploy code to the GPU through its Python SDK.

### Source excerpt

NVIDIA L40S GPUs available on Modal now!

## Friday Q&A 2017-11-10: Observing the A11's Heterogenous Cores

DevFeed: [Friday Q&A 2017-11-10: Observing the A11's Heterogenous Cores](<https://devfeed.tech/articles/friday-q-a-2017-11-10-observing-the-a11-s-heterogenous-cores-30625.md>)

Original publisher: [Read original article](<http://www.mikeash.com/pyblog/friday-qa-2017-11-10-observing-the-a11s-heterogenous-cores.html>)

Author: Mike Ash

Published: 2017-11-10T12:41:00Z

Content type: article

Language: en

Sources: [Mike Ash](<https://devfeed.tech/sources/mike-ash.md>)

Topics: [Parallelism](<https://devfeed.tech/topics/parallelism.md>), [scheduling](<https://devfeed.tech/topics/scheduling.md>), [iOS](<https://devfeed.tech/topics/ios.md>), [iphone](<https://devfeed.tech/topics/iphone.md>)

Tags: [a10](<https://devfeed.tech/tags/a10.md>), [algorithm](<https://devfeed.tech/tags/algorithm.md>), [api](<https://devfeed.tech/tags/api.md>), [apple](<https://devfeed.tech/tags/apple.md>), [benchmarking](<https://devfeed.tech/tags/benchmarking.md>), [chip](<https://devfeed.tech/tags/chip.md>), [cluster](<https://devfeed.tech/tags/cluster.md>), [clustering](<https://devfeed.tech/tags/clustering.md>), [clusters](<https://devfeed.tech/tags/clusters.md>), [code](<https://devfeed.tech/tags/code.md>), [computing](<https://devfeed.tech/tags/computing.md>), [cpu](<https://devfeed.tech/tags/cpu.md>), [friday](<https://devfeed.tech/tags/friday.md>), [ios](<https://devfeed.tech/tags/ios.md>), [iphone](<https://devfeed.tech/tags/iphone.md>), [mobile](<https://devfeed.tech/tags/mobile.md>), [performance](<https://devfeed.tech/tags/performance.md>), [q-a](<https://devfeed.tech/tags/q-a.md>)

### AI overview

The A11's two high performance cores and four high efficiency cores can run simultaneously, unlike the A10's mutually exclusive core groups. To observe this, the author ran six concurrent threads on an iPhone X, each doing repeated integer square root calculations, and sampled short runtimes to reduce the chance that a sample moved between cores. At a 0.05 clustering threshold, samples formed groups near 7 and 9 microseconds, with a single recurring outlier; the author interpreted the separated groups as evidence of the two core types working at once. The speed gap varied by workload, and this integer division heavy microbenchmark may not represent typical tasks. On an iPhone 6+ baseline, samples clustered around 11 microseconds.

### Source excerpt

Apple's newest mobile CPU, the A11, brings a new level of heterogeneous computing to iOS, with both high and low performance cores that are always on. With the release of the iPhone X, I set out to see if I could observe these heterogeneous cores in action. (Read More)