# back end of line

Published articles for back end of line.

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## Self-Heating And Parasitics Challenge Multi-Tier CFET Scaling (TU Munich, IIT Kanpur)

DevFeed: [Self-Heating And Parasitics Challenge Multi-Tier CFET Scaling (TU Munich, IIT Kanpur)](<https://devfeed.tech/articles/self-heating-and-parasitics-challenge-multi-tier-cfet-scaling-tu-munich-iit-kanpur-100108.md>)

Original publisher: [Read original article](<https://semiengineering.com/self-heating-and-parasitics-challenge-multi-tier-cfet-scaling-tu-munich-iit-kanpur/>)

Author: Technical Paper Link

Published: 2026-10-26T07:01:24Z

Content type: news

Language: en

Sources: [Semiconductor Engineering](<https://devfeed.tech/sources/semiconductor-engineering.md>)

Topics: [Chip design](<https://devfeed.tech/topics/chip-design.md>), [Electrical engineering and computer science (EECS)](<https://devfeed.tech/topics/electrical-engineering-and-computer-science-eecs.md>)

Tags: [3d-monolithic-cmos](<https://devfeed.tech/tags/3d-monolithic-cmos.md>), [analyze](<https://devfeed.tech/tags/analyze.md>), [back-end](<https://devfeed.tech/tags/back-end.md>), [back-end-of-line](<https://devfeed.tech/tags/back-end-of-line.md>), [beol](<https://devfeed.tech/tags/beol.md>), [cfet](<https://devfeed.tech/tags/cfet.md>), [circuits](<https://devfeed.tech/tags/circuits.md>), [cmos](<https://devfeed.tech/tags/cmos.md>), [complementary-fet](<https://devfeed.tech/tags/complementary-fet.md>), [design](<https://devfeed.tech/tags/design.md>), [devices](<https://devfeed.tech/tags/devices.md>), [distribution](<https://devfeed.tech/tags/distribution.md>), [experimental](<https://devfeed.tech/tags/experimental.md>), [gaa](<https://devfeed.tech/tags/gaa.md>), [gate-all-around](<https://devfeed.tech/tags/gate-all-around.md>), [heat](<https://devfeed.tech/tags/heat.md>), [indian-institute-of-technology-kanpur](<https://devfeed.tech/tags/indian-institute-of-technology-kanpur.md>), [mol](<https://devfeed.tech/tags/mol.md>), [multi-tier-stacking](<https://devfeed.tech/tags/multi-tier-stacking.md>), [nanosheet-fet](<https://devfeed.tech/tags/nanosheet-fet.md>), [parasitics](<https://devfeed.tech/tags/parasitics.md>), [power-performance](<https://devfeed.tech/tags/power-performance.md>), [scaling](<https://devfeed.tech/tags/scaling.md>), [self-heating](<https://devfeed.tech/tags/self-heating.md>), [study](<https://devfeed.tech/tags/study.md>), [tcad](<https://devfeed.tech/tags/tcad.md>), [technical-papers](<https://devfeed.tech/tags/technical-papers.md>), [technical-university-of-munich](<https://devfeed.tech/tags/technical-university-of-munich.md>), [thermal-management](<https://devfeed.tech/tags/thermal-management.md>), [transistor-reliability](<https://devfeed.tech/tags/transistor-reliability.md>), [transistors](<https://devfeed.tech/tags/transistors.md>), [tu-munich](<https://devfeed.tech/tags/tu-munich.md>)

### AI overview

The study examines how self-heating and interconnect parasitics affect multi-tier CFET design. Using TCAD models calibrated to experimental measurements, the researchers compare four-tier and conventional two-tier CFETs. They also simulate self-heating to analyze heat distribution and temperature profiles, and use 3-D CMOS inverter models with full middle-of-line and back-end-of-line interconnects to extract parasitic RC networks. The supplied excerpt does not state the study's quantitative findings.

### Source excerpt

Researchers at the Technical University of Munich and Indian Institute of Technology Kanpur published "Self-Heating and Parasitic Effects in Multi-Tier CFET Design." Abstract Excerpt: "We study the impact of self-heating effects (SHEs) and middle of line (MOL) and back-end of line (BEOL) induced parasitics on multi-tier CFET design, where multiple nanosheet devices are vertically stacked.... " read more The post Self-Heating And Parasitics Challenge Multi-Tier CFET Scaling (TU Munich, IIT Kanpur) appeared first on Semiconductor Engineering.

## Monolithic 3D Memristor-TFT Stack For Programmable Neuromorphic Computing (SNU, Yonsei)

DevFeed: [Monolithic 3D Memristor-TFT Stack For Programmable Neuromorphic Computing (SNU, Yonsei)](<https://devfeed.tech/articles/monolithic-3d-memristor-tft-stack-for-programmable-neuromorphic-computing-snu-yonsei-66449.md>)

Original publisher: [Read original article](<https://semiengineering.com/monolithic-3d-memristor-tft-stack-for-programmable-neuromorphic-computing-snu-yonsei/>)

Author: Technical Paper Link

Published: 2026-10-06T21:29:31Z

Content type: article

Language: en

Sources: [Semiconductor Engineering](<https://devfeed.tech/sources/semiconductor-engineering.md>)

Topics: [Computing](<https://devfeed.tech/topics/computing.md>), [stream-processing](<https://devfeed.tech/topics/stream-processing.md>), [Sustainable Computing](<https://devfeed.tech/topics/sustainable-computing.md>)

Tags: [3d-ic](<https://devfeed.tech/tags/3d-ic.md>), [ai-ml-dl](<https://devfeed.tech/tags/ai-ml-dl.md>), [architectures](<https://devfeed.tech/tags/architectures.md>), [back-end-of-line](<https://devfeed.tech/tags/back-end-of-line.md>), [beol](<https://devfeed.tech/tags/beol.md>), [computing](<https://devfeed.tech/tags/computing.md>), [emerging-memory](<https://devfeed.tech/tags/emerging-memory.md>), [hfo2](<https://devfeed.tech/tags/hfo2.md>), [in2o3](<https://devfeed.tech/tags/in2o3.md>), [memory](<https://devfeed.tech/tags/memory.md>), [memristors](<https://devfeed.tech/tags/memristors.md>), [monolithic-3d-integration](<https://devfeed.tech/tags/monolithic-3d-integration.md>), [neuromorphic](<https://devfeed.tech/tags/neuromorphic.md>), [neuromorphic-computing](<https://devfeed.tech/tags/neuromorphic-computing.md>), [packaging](<https://devfeed.tech/tags/packaging.md>), [reservoir-computing](<https://devfeed.tech/tags/reservoir-computing.md>), [resistive-memory](<https://devfeed.tech/tags/resistive-memory.md>), [seoul-national-university](<https://devfeed.tech/tags/seoul-national-university.md>), [technical-papers](<https://devfeed.tech/tags/technical-papers.md>), [temporal](<https://devfeed.tech/tags/temporal.md>), [temporal-computing](<https://devfeed.tech/tags/temporal-computing.md>), [tft](<https://devfeed.tech/tags/tft.md>), [thin-film-transistors](<https://devfeed.tech/tags/thin-film-transistors.md>), [transistors](<https://devfeed.tech/tags/transistors.md>), [yonsei-university](<https://devfeed.tech/tags/yonsei-university.md>)

### AI overview

Researchers at Seoul National University and Yonsei University report a monolithically integrated memristor-thin-film transistor reservoir kernel. The abstract says it enables electrically programmable temporal dynamics across a wide timescale, addressing limits in hardware reservoirs whose dynamics are fixed or narrowly tunable.

### Source excerpt

Researchers at Seoul National University and Yonsei University published a technical paper titled "Monolithic three-dimensionally integrated memristor-thin-film transistor for electrically programmable multimode reservoir computing." Abstract Excerpt: "Reservoir computing offers an efficient framework for processing temporal information, but most hardware reservoirs exhibit fixed or narrowly tunable dynamics determined by intrinsic material relaxation time. A monolithically integrated... " read more The post Monolithic 3D Memristor-TFT Stack For Programmable Neuromorphic Computing (SNU, Yonsei) appeared first on Semiconductor Engineering.

## Predicting Thermal Conductivity in Advanced BEOL Interconnect Stacks (Peking University)

DevFeed: [Predicting Thermal Conductivity in Advanced BEOL Interconnect Stacks (Peking University)](<https://devfeed.tech/articles/predicting-thermal-conductivity-in-advanced-beol-interconnect-stacks-peking-university-55472.md>)

Original publisher: [Read original article](<https://semiengineering.com/predicting-thermal-conductivity-in-advanced-beol-interconnect-stacks-peking-university/>)

Author: Technical Paper Link

Published: 2026-09-19T20:05:04Z

Content type: article

Language: en

Sources: [Semiconductor Engineering](<https://devfeed.tech/sources/semiconductor-engineering.md>)

Topics: [structure](<https://devfeed.tech/topics/structure.md>), [dataset](<https://devfeed.tech/topics/dataset.md>), [3D](<https://devfeed.tech/topics/3d.md>), [domain](<https://devfeed.tech/topics/domain.md>)

Tags: [3d](<https://devfeed.tech/tags/3d.md>), [3d-ic](<https://devfeed.tech/tags/3d-ic.md>), [advanced-process-nodes](<https://devfeed.tech/tags/advanced-process-nodes.md>), [analysis](<https://devfeed.tech/tags/analysis.md>), [back-end-of-line](<https://devfeed.tech/tags/back-end-of-line.md>), [beol](<https://devfeed.tech/tags/beol.md>), [circuits](<https://devfeed.tech/tags/circuits.md>), [copper](<https://devfeed.tech/tags/copper.md>), [dielectric-materials](<https://devfeed.tech/tags/dielectric-materials.md>), [effective-medium-theory](<https://devfeed.tech/tags/effective-medium-theory.md>), [engineering](<https://devfeed.tech/tags/engineering.md>), [interconnects](<https://devfeed.tech/tags/interconnects.md>), [layer](<https://devfeed.tech/tags/layer.md>), [manufacturing](<https://devfeed.tech/tags/manufacturing.md>), [materials](<https://devfeed.tech/tags/materials.md>), [measurements](<https://devfeed.tech/tags/measurements.md>), [model](<https://devfeed.tech/tags/model.md>), [models](<https://devfeed.tech/tags/models.md>), [paper](<https://devfeed.tech/tags/paper.md>), [peking-university](<https://devfeed.tech/tags/peking-university.md>), [power-performance](<https://devfeed.tech/tags/power-performance.md>), [practical](<https://devfeed.tech/tags/practical.md>), [semiconductor](<https://devfeed.tech/tags/semiconductor.md>), [spatial](<https://devfeed.tech/tags/spatial.md>), [structure](<https://devfeed.tech/tags/structure.md>), [tdtr](<https://devfeed.tech/tags/tdtr.md>), [technical](<https://devfeed.tech/tags/technical.md>), [technical-papers](<https://devfeed.tech/tags/technical-papers.md>), [thermal-boundary-resistance](<https://devfeed.tech/tags/thermal-boundary-resistance.md>), [thermal-conductivity](<https://devfeed.tech/tags/thermal-conductivity.md>), [thermal-management](<https://devfeed.tech/tags/thermal-management.md>), [thermal-modeling](<https://devfeed.tech/tags/thermal-modeling.md>), [time-domain-thermoreflectance](<https://devfeed.tech/tags/time-domain-thermoreflectance.md>), [university](<https://devfeed.tech/tags/university.md>)

### AI overview

Researchers at Peking University developed a structure-aware framework for predicting thermal conductivity in back-end-of-line interconnect stacks. The framework uses layer-resolved time-domain thermoreflectance measurements, a dataset of more than 40 measured conductivity values, and an effective-medium model for spatial variations within practical layers and 3D integrated circuits.

### Source excerpt

Researchers at Peking University published a technical paper titled "Predictive Structure to Thermal Conductivity Modeling Framework for BEOL Interconnect Stacks in Advanced Technology Nodes Enabled by Extensive Layer Resolved Thermal Measurements." Abstract Excerpt: "The increasing structural complexity of BEOL interconnect stacks in advanced integrated circuits demands a structure-aware thermal conductivity (κ) modeling framework. However, generalizable... " read more The post Predicting Thermal Conductivity in Advanced BEOL Interconnect Stacks (Peking University) appeared first on Semiconductor Engineering.