# bits

Published articles for bits.

This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles.

## Intel's BITCOS format compresses ternary LLM weights to 1.485 bits per weight

DevFeed: [Intel's BITCOS format compresses ternary LLM weights to 1.485 bits per weight](<https://devfeed.tech/articles/intel-squeezed-a-1-58-bit-llm-down-to-1-485-bits-without-changing-a-single-weight-42139.md>)

Original publisher: [Read original article](<https://thenewstack.io/intel-bitcos-ternary-compression/>)

Author: Amanda Caswell

Published: 2026-09-17T20:51:57Z

Content type: article

Language: en

Sources: [The New Stack](<https://devfeed.tech/sources/the-new-stack.md>)

Topics: [Large Language Model](<https://devfeed.tech/topics/llm.md>), [quantization](<https://devfeed.tech/topics/quantization.md>), [Language models](<https://devfeed.tech/topics/language-models.md>), [intel](<https://devfeed.tech/topics/intel.md>), [post-training](<https://devfeed.tech/topics/post-training.md>), [Decoding](<https://devfeed.tech/topics/decoding.md>), [qwen3](<https://devfeed.tech/topics/qwen3.md>)

Tags: [ai-infrastructure](<https://devfeed.tech/tags/ai-infrastructure.md>), [ai-models](<https://devfeed.tech/tags/ai-models.md>), [bits](<https://devfeed.tech/tags/bits.md>), [decoding](<https://devfeed.tech/tags/decoding.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [intel](<https://devfeed.tech/tags/intel.md>), [language](<https://devfeed.tech/tags/language.md>), [llm](<https://devfeed.tech/tags/llm.md>), [model](<https://devfeed.tech/tags/model.md>), [post-training](<https://devfeed.tech/tags/post-training.md>), [quantization](<https://devfeed.tech/tags/quantization.md>), [qwen3](<https://devfeed.tech/tags/qwen3.md>)

### AI overview

Intel researchers developed BITCOS, a storage format for ternary language-model weights that uses the distribution of zero values to compress a checkpoint to 1.485 bits per weight without changing the model weights. The article reports decoding throughput improvements of up to 18% on CPUs and 27% on GPUs.

### Source excerpt

The 1.58 in a 1.58-bit language model sounds like a hard limit, but Intel researchers pushed a ternary model below The post Intel squeezed a 1.58-bit LLM down to 1.485 bits without changing a single weight appeared first on The New Stack.

## CAA DNS Issuer-Critical Flags Are Confusing to Configure

DevFeed: [CAA DNS Issuer-Critical Flags Are Confusing to Configure](<https://devfeed.tech/articles/a-bit-of-dns-28502.md>)

Original publisher: [Read original article](<https://thedailywtf.com/articles/a-bit-of-dns>)

Author: Remy Porter

Published: 2026-09-10T06:30:00Z

Content type: opinion

Language: en

Sources: [The Daily WTF](<https://devfeed.tech/sources/the-daily-wtf.md>)

Topics: [certificates](<https://devfeed.tech/topics/certificates.md>), [domain](<https://devfeed.tech/topics/domain.md>)

Tags: [bits](<https://devfeed.tech/tags/bits.md>), [boolean](<https://devfeed.tech/tags/boolean.md>), [certificates](<https://devfeed.tech/tags/certificates.md>), [documentation](<https://devfeed.tech/tags/documentation.md>), [feature-articles](<https://devfeed.tech/tags/feature-articles.md>), [flag](<https://devfeed.tech/tags/flag.md>), [https](<https://devfeed.tech/tags/https.md>), [readability](<https://devfeed.tech/tags/readability.md>)

### AI overview

The article examines confusion around the issuer-critical flag in DNS CAA records. It explains that the flag is defined as a bitmask, while many users interpret the documentation as requiring the integer 1 instead of the value representing the specified bit, creating a dilemma for certificate issuers such as LetsEncrypt.

### Source excerpt

I'm not a DNS person, in that I appreciate that it exists but am not up on the inner workings. It solves a lot of problems with dark magic I don't fully understand, and fortunately don't need to. But Lucio noticed something that I do think is interesting, within the scope of the CAA record type. The CAA record started with RFC6844, which was obsoleted by RFC8659. Both RFCs lay out the same core idea: you can add a CAA record to your DNS entries to say, "hey, this domain over here is allowed to issue certificates for me". That's the sort of thing that enables LetsEncrypt to hand out certs, and is an important part of why we can run HTTPS everywhere these days. Now, RFC6844 has this in it: Issuer Critical: If set to '1', indicates that the corresponding property tag MUST be understood if the semantics of the CAA record are to be correctly interpreted by an issuer. Issuers MUST NOT issue certificates for a domain if the relevant CAA Resource Record set contains unknown property tags that have the Critical bit set. The issuer critical flag means that the certificate issuer needs to validate your CAA record before it issues a certificate for you. There's more in the RFC about what exactly that means, but we don't care about those details for right now. The rule here is "set a flag to 1". A little later in the RFC, the flag is described in more detail- as a bitmask. Specifically, bit 0 is the issuer critical flag. Bits 1-7 are reserved for future use. Now, here's where we get into trouble, because programmers don't understand bits, and because the CAA record expects you to put an integer in this field. So, if you want issuer critical enabled, what value to you put in this field? 128, obviously. That's 10000000. Except, if you don't understand bits, that's not obvious. A lot of people read this and decided that the documentation meant they needed to put 1 in the field- aka 00000001. This is wrong. The updated RFC tries to explain it a bit more clearly: Bit 0, Issuer Critic

## Unsigned char std::basic\_string\<\> in C++

DevFeed: [Unsigned char std::basic\_string\<\> in C++](<https://devfeed.tech/articles/unsigned-char-std-basic-string-in-c-36572.md>)

Original publisher: [Read original article](<https://berthub.eu/articles/posts/unsigned-char-std-string-cpp/>)

Published: 2026-01-03T22:00:02Z

Content type: tutorial

Language: en

Sources: [Bert Hubert's writings](<https://devfeed.tech/sources/bert-hubert-s-writings.md>)

Topics: [C++](<https://devfeed.tech/topics/c-plus-plus.md>), [standard](<https://devfeed.tech/topics/standard.md>), [LLVM](<https://devfeed.tech/topics/llvm.md>), [clang](<https://devfeed.tech/topics/clang.md>), [gcc](<https://devfeed.tech/topics/gcc.md>)

Tags: [bits](<https://devfeed.tech/tags/bits.md>), [c-plus-plus](<https://devfeed.tech/tags/c-plus-plus.md>), [clang](<https://devfeed.tech/tags/clang.md>), [concatenation](<https://devfeed.tech/tags/concatenation.md>), [cryptographic](<https://devfeed.tech/tags/cryptographic.md>), [freebsd](<https://devfeed.tech/tags/freebsd.md>), [gcc](<https://devfeed.tech/tags/gcc.md>), [llvm](<https://devfeed.tech/tags/llvm.md>), [openbsd](<https://devfeed.tech/tags/openbsd.md>), [standard](<https://devfeed.tech/tags/standard.md>), [string](<https://devfeed.tech/tags/string.md>)

### AI overview

A C++ post explains why code using std::basic_string<uint8_t> can fail on FreeBSD and OpenBSD. The issue involves std::char_traits: LLVM 19 removed its unconstrained base template because the C++ Standard does not require it for unsigned-character types. Code may need string concatenation and related operations replaced or a correct custom specialization provided.

### Source excerpt

Brief post on a somewhat vexing and irritating C++ problem I ran into some time ago. I hope that this page will help other people deal with this problem more quickly than I did. I've long used std::basic_string<uint8_t>, an unsigned char string, for fiddling with bits. You could use a regular char string, but especially when doing cryptographic or sub-byte operations, it is more convenient to not have to deal with sign bits.

## p-fast trie: lexically ordered hash map

DevFeed: [p-fast trie: lexically ordered hash map](<https://devfeed.tech/articles/p-fast-trie-lexically-ordered-hash-map-36219.md>)

Original publisher: [Read original article](<https://dotat.at/@/2025-08-04-p-fast-trie.html>)

Published: 2025-08-04T20:52:21Z

Content type: article

Language: en

Sources: [Tony Finch's blog](<https://devfeed.tech/sources/tony-finch-s-blog.md>)

Topics: [hash](<https://devfeed.tech/topics/hash.md>), [Query (disambiguation)](<https://devfeed.tech/topics/query.md>), [Rust](<https://devfeed.tech/topics/rust.md>)

Tags: [array](<https://devfeed.tech/tags/array.md>), [bits](<https://devfeed.tech/tags/bits.md>), [hash](<https://devfeed.tech/tags/hash.md>), [map](<https://devfeed.tech/tags/map.md>), [maps](<https://devfeed.tech/tags/maps.md>), [query](<https://devfeed.tech/tags/query.md>)

### AI overview

This article sketches the p-fast trie, a proposed lexically ordered hash map that replaces a qp-trie's tree and interior pointers with stratified hash-map levels keyed by prefixes. It describes O(1) exact-match lookups and O(log k) predecessor and successor searches, while noting that the practical benefit is uncertain.

### Source excerpt

Here's a sketch of an idea that might or might not be a good idea. Dunno if it's similar to something already described in the literature - if you know of something, please let me know via the links in the footer! The gist is to throw away the tree and interior pointers from a qp-trie. Instead, the p-fast trie is stored using a hash map organized into stratified levels, where each level corresponds to a prefix of the key. Exact-match lookups are normal O(1) hash map lookups. Predecessor / successor searches use binary chop on the length of the key. Where a qp-trie search is O(k), where k is the length of the key, a p-fast trie search is O(log k). This smaller O(log k) bound is why I call it a "p-fast trie" by analogy with the x-fast trie, which has O(log log N) query time. (The "p" is for popcount.) I'm not sure if this asymptotic improvement is likely to be effective in practice; see my thoughts towards the end of this note. layout A p-fast trie consists of: Leaf objects, each of which has a name. Each leaf object refers to its successor forming a circular linked list. (The last leaf refers to the first.) Multiple interior nodes refer to each leaf object. A hash map containing every (strict) prefix of every name in the trie. Each prefix maps to a unique interior node. Names are treated as bit strings split into chunks of (say) 6 bits, and prefixes are whole numbers of chunks. An interior node contains a (1<<6) == 64 wide bitmap with a bit set for each chunk where prefix+chunk matches a key. Following the bitmap is a popcount-compressed array of references to the leaf objects that are the closest predecessor of the corresponding prefix+chunk key. Prefixes are strictly shorter than names so that we can avoid having to represent non-values after the end of a name, and so that it's OK if one name is a prefix of another. The size of chunks and bitmaps might change; 6 is a guess that I expect will work OK. For restricted alphabets you can use something like my DNS trie n

## Rust HashMap notes

DevFeed: [Rust HashMap notes](<https://devfeed.tech/articles/rust-hashmap-notes-35458.md>)

Original publisher: [Read original article](<https://darkcoding.net/software/rust-hashmap-notes/>)

Author: Graham King

Published: 2025-03-30T14:50:00Z

Content type: article

Language: en

Sources: [Graham King](<https://devfeed.tech/sources/graham-king.md>)

Topics: [Rust](<https://devfeed.tech/topics/rust.md>), [implementation](<https://devfeed.tech/topics/implementation.md>), [Data structures](<https://devfeed.tech/topics/data-structures.md>)

Tags: [array](<https://devfeed.tech/tags/array.md>), [bits](<https://devfeed.tech/tags/bits.md>), [cache](<https://devfeed.tech/tags/cache.md>), [code](<https://devfeed.tech/tags/code.md>), [datastructures](<https://devfeed.tech/tags/datastructures.md>), [hash](<https://devfeed.tech/tags/hash.md>), [hashmap](<https://devfeed.tech/tags/hashmap.md>), [implementation](<https://devfeed.tech/tags/implementation.md>), [optimization](<https://devfeed.tech/tags/optimization.md>), [rust](<https://devfeed.tech/tags/rust.md>), [software](<https://devfeed.tech/tags/software.md>)

### AI overview

Raw research notes explaining the design and implementation of Rust's HashMap. The article describes its SwissTable-based probing layout, contiguous storage, control bytes, SIMD comparisons, hash decomposition, lookup process, and growth behavior.

### Source excerpt

Raw notes on Rust's HashMap design and implementation

## Encoding Schemes in FHE

DevFeed: [Encoding Schemes in FHE](<https://devfeed.tech/articles/encoding-schemes-in-fhe-40476.md>)

Original publisher: [Read original article](<https://www.jeremykun.com/2023/09/18/encoding-schemes-in-fhe/>)

Published: 2023-09-18T11:08:39Z

Content type: tutorial

Language: en

Sources: [Jeremy Kun](<https://devfeed.tech/sources/jeremy-kun.md>)

Topics: [Encoding](<https://devfeed.tech/topics/encoding.md>), [FHE](<https://devfeed.tech/topics/fhe.md>), [homomorphic encryption](<https://devfeed.tech/topics/homomorphic-encryption.md>), [Cryptography](<https://devfeed.tech/topics/cryptography.md>), [Decoding](<https://devfeed.tech/topics/decoding.md>)

Tags: [bits](<https://devfeed.tech/tags/bits.md>), [complex-numbers](<https://devfeed.tech/tags/complex-numbers.md>), [cryptography](<https://devfeed.tech/tags/cryptography.md>), [decoding](<https://devfeed.tech/tags/decoding.md>), [encoding](<https://devfeed.tech/tags/encoding.md>), [fhe](<https://devfeed.tech/tags/fhe.md>), [homomorphic-encryption](<https://devfeed.tech/tags/homomorphic-encryption.md>), [learning-with-errors](<https://devfeed.tech/tags/learning-with-errors.md>), [lwe](<https://devfeed.tech/tags/lwe.md>), [mathematics](<https://devfeed.tech/tags/mathematics.md>), [number-theory](<https://devfeed.tech/tags/number-theory.md>), [programming](<https://devfeed.tech/tags/programming.md>), [residue-number-system](<https://devfeed.tech/tags/residue-number-system.md>), [rlwe](<https://devfeed.tech/tags/rlwe.md>), [scaling](<https://devfeed.tech/tags/scaling.md>), [scheme](<https://devfeed.tech/tags/scheme.md>)

### AI overview

This article explains how cleartexts are transformed into plaintexts through encoding, and reversed through decoding, in homomorphic encryption. It catalogs encoding approaches for different HE schemes, including bit-field encoding for LWE and considerations for noise, scaling, bit positions, and programmable bootstrapping in CGGI/TFHE.

### Source excerpt

In cryptography, we need a distinction between a cleartext and a plaintext. A cleartext is a message in its natural form. A plaintext is a cleartext that is represented in a specific way to prepare it for encryption in a specific scheme. The process of taking a cleartext and turning it into a plaintext is called encoding, and the reverse is called decoding. In homomorphic encryption, the distinction matters. Cleartexts are generally all integers, though the bit width of allowed integers can be restricted (e.

## Two's Complement and Group Theory

DevFeed: [Two's Complement and Group Theory](<https://devfeed.tech/articles/two-s-complement-and-group-theory-40465.md>)

Original publisher: [Read original article](<https://www.jeremykun.com/2023/07/10/twos-complement-and-group-theory/>)

Published: 2023-07-10T07:00:00Z

Content type: article

Language: en

Sources: [Jeremy Kun](<https://devfeed.tech/sources/jeremy-kun.md>)

Topics: [math](<https://devfeed.tech/topics/math.md>), [Mathematics](<https://devfeed.tech/topics/mathematics.md>), [Computer science](<https://devfeed.tech/topics/computer-science.md>), [Programming](<https://devfeed.tech/topics/programming.md>)

Tags: [abelian-groups](<https://devfeed.tech/tags/abelian-groups.md>), [arithmetic](<https://devfeed.tech/tags/arithmetic.md>), [bits](<https://devfeed.tech/tags/bits.md>), [boolean](<https://devfeed.tech/tags/boolean.md>), [circuits](<https://devfeed.tech/tags/circuits.md>), [computer-science](<https://devfeed.tech/tags/computer-science.md>), [group-actions](<https://devfeed.tech/tags/group-actions.md>), [groups](<https://devfeed.tech/tags/groups.md>), [math](<https://devfeed.tech/tags/math.md>), [mathematics](<https://devfeed.tech/tags/mathematics.md>), [programming](<https://devfeed.tech/tags/programming.md>), [quotients](<https://devfeed.tech/tags/quotients.md>), [symmetry](<https://devfeed.tech/tags/symmetry.md>), [twos-complement](<https://devfeed.tech/tags/twos-complement.md>)

### AI overview

The article explains two's-complement signed integer arithmetic using group theory. It presents signed and unsigned n-bit integers as representations of the quotient group of integers modulo 2^n, clarifying why the same arithmetic circuits can operate on both.

### Source excerpt

Before I discovered math, I was a first year undergrad computer science student taking Electrical Engineering 101. The first topic I learned was what bits and boolean gates are, and the second was the two's complement representation of a negative n-bit integer. At the time two's complement seemed to me like a bizarre quirk of computer programming, with minutiae you just had to memorize. If the leading bit is 1, it's negative, and otherwise it's positive.

## Petite-Vue: A 5.8 KB JavaScript Library for Adding Small Interactions to Server-Rendered Pages

DevFeed: [Petite-Vue: A 5.8 KB JavaScript Library for Adding Small Interactions to Server-Rendered Pages](<https://devfeed.tech/articles/a-little-taste-of-petite-vue-31234.md>)

Original publisher: [Read original article](<https://nystudio107.com/blog/a-little-taste-of-petite-vue>)

Author: andrew@nystudio107.com (Andrew Welch)

Published: 2021-08-20T06:41:00Z

Content type: article

Language: en

Sources: [nystudio107 | Articles on modern web development.](<https://devfeed.tech/sources/nystudio107-articles-on-modern-web-development.md>)

Topics: [Vue.js](<https://devfeed.tech/topics/vue.md>), [JavaScript](<https://devfeed.tech/topics/javascript.md>), [Library](<https://devfeed.tech/topics/library.md>), [Web Development](<https://devfeed.tech/topics/web-development.md>), [Front end](<https://devfeed.tech/topics/frontend.md>), [interactive website](<https://devfeed.tech/topics/interactive-website.md>)

Tags: [5-8kb](<https://devfeed.tech/tags/5-8kb.md>), [bits](<https://devfeed.tech/tags/bits.md>), [gives](<https://devfeed.tech/tags/gives.md>), [insights](<https://devfeed.tech/tags/insights.md>), [interaction](<https://devfeed.tech/tags/interaction.md>), [javascript](<https://devfeed.tech/tags/javascript.md>), [library](<https://devfeed.tech/tags/library.md>), [optimized](<https://devfeed.tech/tags/optimized.md>), [pages](<https://devfeed.tech/tags/pages.md>), [petite-vue](<https://devfeed.tech/tags/petite-vue.md>), [power](<https://devfeed.tech/tags/power.md>), [slimmed](<https://devfeed.tech/tags/slimmed.md>), [small](<https://devfeed.tech/tags/small.md>), [sprinkling](<https://devfeed.tech/tags/sprinkling.md>), [tiny](<https://devfeed.tech/tags/tiny.md>), [vue](<https://devfeed.tech/tags/vue.md>), [vue-js](<https://devfeed.tech/tags/vue-js.md>), [web](<https://devfeed.tech/tags/web.md>)

### AI overview

This article introduces Petite-Vue, a 5.8 KB JavaScript micro-framework for progressively enhancing server-rendered HTML with small interactive features. It compares Petite-Vue with Alpine.js and highlights its Vue-compatible API, migration path to Vue.js, existing Vue ecosystem, and TypeScript support.

### Source excerpt

Petite-Vue is a tiny 5.8kb JavaScript library that gives you the power of Vue.js, but slimmed down & optimized for sprinkling small bits of interaction on your web pages

## Multiple Qubits and the Quantum Circuit

DevFeed: [Multiple Qubits and the Quantum Circuit](<https://devfeed.tech/articles/multiple-qubits-and-the-quantum-circuit-40374.md>)

Original publisher: [Read original article](<https://www.jeremykun.com/2015/01/26/multiple-qubits-and-the-quantum-circuit/>)

Published: 2015-01-26T09:00:00Z

Content type: article

Language: en

Sources: [Jeremy Kun](<https://devfeed.tech/sources/jeremy-kun.md>)

Topics: [circuit](<https://devfeed.tech/topics/circuit.md>)

Tags: [2](<https://devfeed.tech/tags/2.md>), [bits](<https://devfeed.tech/tags/bits.md>), [circuits](<https://devfeed.tech/tags/circuits.md>), [entanglement](<https://devfeed.tech/tags/entanglement.md>), [linear-algebra](<https://devfeed.tech/tags/linear-algebra.md>), [multiple](<https://devfeed.tech/tags/multiple.md>), [physics](<https://devfeed.tech/tags/physics.md>), [quantum](<https://devfeed.tech/tags/quantum.md>), [quantum-computing](<https://devfeed.tech/tags/quantum-computing.md>), [tensor-product](<https://devfeed.tech/tags/tensor-product.md>), [tensors](<https://devfeed.tech/tags/tensors.md>)

### AI overview

This article explains why the tensor product is the natural mathematical representation of the joint state of multiple qubits. It also introduces basic quantum gates and the definition of a quantum circuit.

### Source excerpt

Last time we left off with the tantalizing question: how do you do a quantum "AND" operation on two qubits? In this post we'll see why the tensor product is the natural mathematical way to represent the joint state of multiple qubits. Then we'll define some basic quantum gates, and present the definition of a quantum circuit. Working with Multiple Qubits In a classical system, if you have two bits with values $ b_1, b_2$, then the "joint state" of the two bits is given by the concatenated string $ b_1b_2$.

## The Quantum Bit

DevFeed: [The Quantum Bit](<https://devfeed.tech/articles/the-quantum-bit-40373.md>)

Original publisher: [Read original article](<https://www.jeremykun.com/2014/12/15/the-quantum-bit/>)

Published: 2014-12-15T10:00:52Z

Content type: tutorial

Language: en

Sources: [Jeremy Kun](<https://devfeed.tech/sources/jeremy-kun.md>)

Topics: [Quantum Computing](<https://devfeed.tech/topics/quantum-computing.md>), [Computing](<https://devfeed.tech/topics/computing.md>), [circuit](<https://devfeed.tech/topics/circuit.md>)

Tags: [bits](<https://devfeed.tech/tags/bits.md>), [circuit](<https://devfeed.tech/tags/circuit.md>), [circuits](<https://devfeed.tech/tags/circuits.md>), [complex-numbers](<https://devfeed.tech/tags/complex-numbers.md>), [computing](<https://devfeed.tech/tags/computing.md>), [linear-algebra](<https://devfeed.tech/tags/linear-algebra.md>), [mathematics](<https://devfeed.tech/tags/mathematics.md>), [measurement](<https://devfeed.tech/tags/measurement.md>), [quantum](<https://devfeed.tech/tags/quantum.md>), [quantum-computing](<https://devfeed.tech/tags/quantum-computing.md>), [quantum-mechanics](<https://devfeed.tech/tags/quantum-mechanics.md>), [qubit](<https://devfeed.tech/tags/qubit.md>), [unitary-matrices](<https://devfeed.tech/tags/unitary-matrices.md>)

### AI overview

An introduction to quantum computing that extends classical circuit concepts to qubits. It defines a qubit as a unit vector in the complex plane of two dimensions and explains why extracting information from qubits differs from reading classical bits.

### Source excerpt

The best place to start our journey through quantum computing is to recall how classical computing works and try to extend it. Since our final quantum computing model will be a circuit model, we should informally discuss circuits first. A circuit has three parts: the "inputs," which are bits (either zero or one); the "gates," which represent the lowest-level computations we perform on bits; and the "wires," which connect the outputs of gates to the inputs of other gates.

## Hardware entropy: RDRAND

DevFeed: [Hardware entropy: RDRAND](<https://devfeed.tech/articles/hardware-entropy-rdrand-38923.md>)

Original publisher: [Read original article](<https://idea.popcount.org/2013-03-25-hardware-entropy-rdrand>)

Author: Marek

Published: 2013-03-24T23:00:00Z

Content type: article

Language: en

Sources: [Marek Majkowski](<https://devfeed.tech/sources/marek-majkowski.md>)

Topics: [Randomizer](<https://devfeed.tech/topics/randomizer.md>), [Hardware](<https://devfeed.tech/topics/hardware.md>), [cpu](<https://devfeed.tech/topics/cpu.md>), [Security](<https://devfeed.tech/topics/security.md>), [intel](<https://devfeed.tech/topics/intel.md>), [Linux Kernel](<https://devfeed.tech/topics/linux-kernel.md>)

Tags: [aes](<https://devfeed.tech/tags/aes.md>), [ansi](<https://devfeed.tech/tags/ansi.md>), [bits](<https://devfeed.tech/tags/bits.md>), [cryptographic](<https://devfeed.tech/tags/cryptographic.md>), [entropy](<https://devfeed.tech/tags/entropy.md>), [fips](<https://devfeed.tech/tags/fips.md>), [generator](<https://devfeed.tech/tags/generator.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [intel](<https://devfeed.tech/tags/intel.md>), [kernel](<https://devfeed.tech/tags/kernel.md>), [linux-kernel](<https://devfeed.tech/tags/linux-kernel.md>), [nist](<https://devfeed.tech/tags/nist.md>), [security](<https://devfeed.tech/tags/security.md>), [time](<https://devfeed.tech/tags/time.md>)

### AI overview

This article explains Intel's RDRAND instruction, which uses an on-processor entropy source and AES conditioning to produce hardware-generated random numbers. It also describes checking the carry flag because RDRAND may temporarily return no data when demand exceeds hardware supply.

### Source excerpt

Hardware entropy: RDRAND This is the third blog post on machine instructions: This time I've noticed instruction. According to Wikipedia is: ... a random number generator that is compliant with security and cryptographic standards such as NIST SP800-90, FIPS 140-2, and ANSI X9.82. The generator uses an on-processor entropy source, which passes the randomly generated bits to an AES (in CBC-MAC mode) conditioner to distill the entropy into non-deterministic random numbers. Sounds good.

## Arithmetic Overflow and Intrinsics

DevFeed: [Arithmetic Overflow and Intrinsics](<https://devfeed.tech/articles/arithmetic-overflow-and-intrinsics-30646.md>)

Original publisher: [Read original article](<http://bad-concurrency.blogspot.com/2012/08/arithmetic-overflow-and-intrinsics.html>)

Author: Michael Barker (noreply@blogger.com)

Published: 2012-08-30T12:05:00Z

Content type: tutorial

Language: en

Sources: [Bad Concurrency](<https://devfeed.tech/sources/bad-concurrency.md>)

Topics: [Java](<https://devfeed.tech/topics/java.md>), [JIT](<https://devfeed.tech/topics/jit.md>), [x86](<https://devfeed.tech/topics/x86.md>), [Assembly](<https://devfeed.tech/topics/assembly.md>), [Arm](<https://devfeed.tech/topics/arm.md>)

Tags: [arm](<https://devfeed.tech/tags/arm.md>), [bits](<https://devfeed.tech/tags/bits.md>), [java](<https://devfeed.tech/tags/java.md>), [jit](<https://devfeed.tech/tags/jit.md>), [jvm](<https://devfeed.tech/tags/jvm.md>), [x86](<https://devfeed.tech/tags/x86.md>)

### AI overview

This article explains JVM intrinsics: recognizable code patterns that the JVM can compile into more efficient machine-specific assembly. It uses Java's Integer.bitCount() and Intel's POPCNT instruction to show how an intrinsic can replace a larger sequence of CPU instructions with one instruction, and outlines how HotSpot identifies and JIT-compiles frequently used methods.

### Source excerpt

During a recent conversation on the LJC mailing list around a proposal for adding a library to the JDK that would add support for handling integer overflow a question arose. Would the JVM be able to optimise this code to make efficient use of the hardware support for overflow detection if this functionality was implemented as a library. I made the comment that this is problem is probably one best solved using intrinsics, but in the course of writing an explanation I thought it would be better explained in a blog post, so here goes... What is an Intrinsic? From the JVM perspective an intrinsic an identifiable code pattern (typically a method) where the JVM understands the intent, such that it can be complied to more optimal machine specific assembly. This is really useful when you have multiple target platforms and a subset of those targets contain instructions that may not be available on the others. E.g. Intel's X86 instruction set is quite rich when compared to a RISC-type processor, such as ARM. An Example using POPCNT One of the simplest examples of an intrinsic is the Integer.bitCount() method and the optimisation into Intel's POPCNT instruction (available on Nehalem and later), partially because it can be disabled and the effects of it not being applied are easy to observe. Lets start with some simple code that calls the Integer.bitCount() method: The implementation of the Integer.bitCount() is a reasonably complex combination of arithmetic and bit shifting in order to calculate the number of bits set to 1 within a given int1. If we run the PopCntTest class and print out the assembler generated by hotspot, we can see that this will result in quite a large number of instructions that need to be issued to the CPU. Running the class using following command line (-XX:-UsePopCountInstruction disables the intrinsic): java -XX:+UnlockDiagnosticVMOptions -XX:+PrintAssembly -XX:-UsePopCountInstruction PopCntTest. Generates the following assembly code: Now, lets look at