# d-matrix Published articles for d-matrix. This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles. ## 11 insights from the CASPA CEO Summit: AI infrastructure hardware becomes a systems game DevFeed: [11 insights from the CASPA CEO Summit: AI infrastructure hardware becomes a systems game]() Original publisher: [Read original article]() Author: Jonathan Anthony Published: 2026-10-27T19:11:04Z Content type: article Language: en Sources: [SiliconANGLE]() Topics: [AI Infrastructure](), [systems](), [Artificial Intelligence](), [High-Performance Computing](), [communications]() Tags: [ai](), [ai-accelerators](), [ai-inference](), [ai-infrastructure](), [ankur-gupta](), [artificial-intelligence](), [caspa](), [ceo](), [chip-design](), [chips](), [complete](), [cube-event-coverage](), [custom-silicon](), [d-matrix](), [data-center-connectivity](), [data-storage](), [david-lam](), [define](), [edge-ai](), [faris-sbahi](), [faster](), [first](), [game](), [gpus](), [greg-ernst](), [hardware](), [high-bandwidth-memory](), [hong-hou](), [inference-economics](), [infra](), [infrastructure](), [insights](), [irving-tan](), [keep](), [lam-research-corp](), [links](), [lumentum-holdings-inc](), [machine](), [maskless-lithography](), [melton-chang](), [memory](), [michael-hurlston](), [naveen-rao](), [news](), [normal-computing-corp](), [optical-interconnects](), [optical-networking](), [physical-ai](), [summit](), [systems](), [thecube]() ### AI overview AI infrastructure is becoming a systems problem: processor performance depends on links, memory, storage and power working together, and each is developing its own bottlenecks. The summit highlights several responses: optical links and fiber to ease bandwidth and power constraints; CXL memory pooling and in-memory computation to address limited, costly memory; workload-specific racks and memory-centric accelerators for inference; and storage tiering as data volumes grow. It also describes maskless parallel e-beam lithography as an approach to advanced packaging, physics-based computing as an experimental path to lower-energy AI, and digital twins to manage rapid AI power swings. Siemens says its GPU-based design engines deliver 10-12-fold speedups and that AI agents automate setup and debugging while retaining deterministic design results. Supply and timing remain constraints: memory is reported sold out through 2028, optical demand exceeds capacity, and power infrastructure's six-to-ten-year cycles lag hardware that changes roughly annually. ### Source excerpt Faster chips alone no longer define the AI buildout. Hundreds of thousands of processors now work together as one machine, so AI infrastructure hardware is designed and judged as a complete system. That system runs from the optical links between racks to the memory, storage and power that keep GPUs busy. The next phase will [...] The post 11 insights from the CASPA CEO Summit: AI infrastructure hardware becomes a systems game appeared first on SiliconANGLE. ## Full speed ahead: Despite calls to slow AI down, its support structure is on the fast track DevFeed: [Full speed ahead: Despite calls to slow AI down, its support structure is on the fast track]() Original publisher: [Read original article]() Author: Mark Albertson Published: 2026-09-18T03:38:59Z Content type: news Language: en Sources: [SiliconANGLE]() Topics: [Artificial Intelligence](), [cloud-infrastructure](), [Inference](), [Amazon Web Services](), [Graviton](), [cpu](), [Optimization](), [Arm](), [Orchestration]() Tags: [acceleron](), [ai](), [ai-infra-summit](), [ai-infrastructure](), [amazon-web-services](), [arm](), [arun-nandi](), [aws](), [broadcom](), [carrier](), [cpu](), [d-matrix](), [datacenter](), [dram](), [dreamforce](), [ethernet](), [graviton](), [hasan-siraj](), [high-bandwidth-compute](), [high-bandwidth-memory](), [inference](), [infra](), [infrastructure](), [karan-batta](), [memory](), [networking](), [news](), [nvidia](), [nvlink-fusion](), [oracle](), [peter-desantis](), [qualcomm](), [raptor](), [sid-sheth](), [silicon](), [sram](), [the-latest](), [tony-pialis](), [top-story-3](), [top-story-6]() ### AI overview The article reports on AI infrastructure discussions at the AI Infra Summit, where technology companies described efforts to meet growing inference demands. It highlights AI's power, memory and cost pressures, the importance of tokens per watt, and AWS's use of Arm-based Graviton CPUs for energy-efficient cloud workloads and real-time AI reasoning. ### Source excerpt While tech titans at Salesforce Inc.'s Dreamforce event in San Francisco this week engaged in a spirited debate over whether the pace of deployment for artificial intelligence should be slowed, a group of high-powered tech experts were meeting at the same time about an hour's drive south to describe how they were building AI's infrastructure [...] The post Full speed ahead: Despite calls to slow AI down, its support structure is on the fast track appeared first on SiliconANGLE. ## d-Matrix Joins the NVIDIA NVLink Fusion Platform DevFeed: [d-Matrix Joins the NVIDIA NVLink Fusion Platform]() Original publisher: [Read original article]() Author: Cliff Robinson Published: 2026-09-12T21:42:59Z Content type: news Language: en Sources: [ServeTheHome]() Topics: [d-matrix](), [NVLink](), [Nvidia](), [xpu](), [Inference](), [data centers](), [Network](), [cpu](), [NVIDIA Spectrum-X Ethernet]() Tags: [accelerators](), [ai](), [ai-accelerator](), [ai-inference](), [d-matrix](), [data-center](), [ethernet](), [networking](), [nvidia](), [nvidia-vera](), [nvlink](), [server](), [xpu]() ### AI overview d-Matrix and NVIDIA announced that d-Matrix will bring its next-generation XPUs to the NVLink Fusion platform. The integration is intended to support scaling from individual Raptor XPUs to larger rack-scale and clustered deployments for AI inference, alongside NVIDIA networking and CPU technologies. ### Source excerpt d-Matrix and NVIDIA announced that d-Matrix will use NVLink Fusion to scale up and out with its next-gen Raptor AI accelerators The post d-Matrix Joins the NVIDIA NVLink Fusion Platform appeared first on ServeTheHome. ## Startup d-Matrix Will Pair Its Raptor Memory-Based XPU To Nvidia Rackscale Iron DevFeed: [Startup d-Matrix Will Pair Its Raptor Memory-Based XPU To Nvidia Rackscale Iron]() Original publisher: [Read original article]() Author: Jeff Burt Published: 2026-09-10T14:52:10Z Content type: article Language: en Sources: [The Next Platform: In-depth coverage of high end computing]() Topics: [Artificial Intelligence](), [Inference](), [GPU](), [Hardware](), [data centers](), [xpu]() Tags: [accelerators](), [ai](), [blackwell-gpu](), [compute](), [corsair](), [d-matrix](), [inference](), [latency](), [low-latency-inference](), [lpx](), [mgx](), [nvidia](), [rackscale](), [raptor](), [xpu]() ### AI overview This article reports on d-Matrix pairing its memory-based Raptor XPU with Nvidia Blackwell GPU accelerators in rack-scale systems. The approach assigns compute-intensive inference prefill work to GPUs and token-generation decode work to the XPU, aiming to improve low-latency AI inference and reduce costs. ### Source excerpt Engineers with startup d-Matrix have spent the past seven years putting together the pieces of what ... ## d-Matrix Adopts NVIDIA NVLink Fusion for Rack-Scale XPU Deployment DevFeed: [d-Matrix Adopts NVIDIA NVLink Fusion for Rack-Scale XPU Deployment]() Original publisher: [Read original article]() Author: Jesse Clayton Published: 2026-09-10T13:00:21Z Content type: news Language: en Sources: [NVIDIA]() Topics: [NVLink](), [AI Platform](), [Inference](), [Deployment](), [Network](), [Latency](), [cpu](), [GPU]() Tags: [ai-inference](), [ai-infrastructure](), [ai-platform](), [corporate](), [d-matrix](), [deployment](), [gpu](), [latency](), [networking](), [nvidia](), [nvidia-vera](), [nvidia-vera-rubin](), [nvlink](), [spectrum-x](), [xpu]() ### AI overview d-Matrix announced plans to use NVIDIA NVLink Fusion to connect its next-generation Raptor XPUs with NVIDIA AI infrastructure. The article describes using NVLink, Spectrum-X networking and MGX rack designs to support rack-scale, low-latency inference deployments. ### Source excerpt AI inference chipmaker d-Matrix today announced it will use NVLink Fusion to connect its next-generation Raptor XPUs to NVIDIA's AI infrastructure platform -- joining a growing roster of ecosystem partners. By connecting Raptor to NVIDIA NVLink scale-up and Spectrum-X scale-out networking, the NVIDIA MGX rack architecture and the broader NVIDIA AI platform, NVLink Fusion gives [...] ## d-Matrix drinks the Nvidia Kool-Aid with NVLink Fusion and MGX rack designs DevFeed: [d-Matrix drinks the Nvidia Kool-Aid with NVLink Fusion and MGX rack designs]() Original publisher: [Read original article]() Author: Tobias Mann Published: 2026-09-10T13:00:00Z Content type: news Language: en Sources: [theregister]() Topics: [NVLink](), [d-matrix](), [AI Platform]() Tags: [ai](), [ai-infrastructure](), [amazon](), [d-matrix](), [datacenter](), [fujitsu](), [gpu](), [nvidia](), [nvlink](), [startup](), [systems](), [xpu]() ### AI overview d-Matrix, an AI infrastructure startup, is described as joining other companies as an NVLink supporter. The headline also references NVLink Fusion and MGX rack designs. ### Source excerpt AI infrastructure startup joins Qualcomm, Arm, Marvell, Amazon, Fujitsu, and MediaTek as NVLink true believers