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## 11 insights from the CASPA CEO Summit: AI infrastructure hardware becomes a systems game

DevFeed: [11 insights from the CASPA CEO Summit: AI infrastructure hardware becomes a systems game](<https://devfeed.tech/articles/11-insights-from-the-caspa-ceo-summit-ai-infrastructure-hardware-becomes-a-systems-game-102558.md>)

Original publisher: [Read original article](<https://siliconangle.com/2026/10/27/ai-infrastructure-hardware-now-systems-game-10-insights-caspa/>)

Author: Jonathan Anthony

Published: 2026-10-27T19:11:04Z

Content type: article

Language: en

Sources: [SiliconANGLE](<https://devfeed.tech/sources/siliconangle.md>)

Topics: [AI Infrastructure](<https://devfeed.tech/topics/ai-infrastructure.md>), [systems](<https://devfeed.tech/topics/systems.md>), [Artificial Intelligence](<https://devfeed.tech/topics/ai.md>), [High-Performance Computing](<https://devfeed.tech/topics/high-performance-computing.md>), [communications](<https://devfeed.tech/topics/communications.md>)

Tags: [ai](<https://devfeed.tech/tags/ai.md>), [ai-accelerators](<https://devfeed.tech/tags/ai-accelerators.md>), [ai-inference](<https://devfeed.tech/tags/ai-inference.md>), [ai-infrastructure](<https://devfeed.tech/tags/ai-infrastructure.md>), [ankur-gupta](<https://devfeed.tech/tags/ankur-gupta.md>), [artificial-intelligence](<https://devfeed.tech/tags/artificial-intelligence.md>), [caspa](<https://devfeed.tech/tags/caspa.md>), [ceo](<https://devfeed.tech/tags/ceo.md>), [chip-design](<https://devfeed.tech/tags/chip-design.md>), [chips](<https://devfeed.tech/tags/chips.md>), [complete](<https://devfeed.tech/tags/complete.md>), [cube-event-coverage](<https://devfeed.tech/tags/cube-event-coverage.md>), [custom-silicon](<https://devfeed.tech/tags/custom-silicon.md>), [d-matrix](<https://devfeed.tech/tags/d-matrix.md>), [data-center-connectivity](<https://devfeed.tech/tags/data-center-connectivity.md>), [data-storage](<https://devfeed.tech/tags/data-storage.md>), [david-lam](<https://devfeed.tech/tags/david-lam.md>), [define](<https://devfeed.tech/tags/define.md>), [edge-ai](<https://devfeed.tech/tags/edge-ai.md>), [faris-sbahi](<https://devfeed.tech/tags/faris-sbahi.md>), [faster](<https://devfeed.tech/tags/faster.md>), [first](<https://devfeed.tech/tags/first.md>), [game](<https://devfeed.tech/tags/game.md>), [gpus](<https://devfeed.tech/tags/gpus.md>), [greg-ernst](<https://devfeed.tech/tags/greg-ernst.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [high-bandwidth-memory](<https://devfeed.tech/tags/high-bandwidth-memory.md>), [hong-hou](<https://devfeed.tech/tags/hong-hou.md>), [inference-economics](<https://devfeed.tech/tags/inference-economics.md>), [infra](<https://devfeed.tech/tags/infra.md>), [infrastructure](<https://devfeed.tech/tags/infrastructure.md>), [insights](<https://devfeed.tech/tags/insights.md>), [irving-tan](<https://devfeed.tech/tags/irving-tan.md>), [keep](<https://devfeed.tech/tags/keep.md>), [lam-research-corp](<https://devfeed.tech/tags/lam-research-corp.md>), [links](<https://devfeed.tech/tags/links.md>), [lumentum-holdings-inc](<https://devfeed.tech/tags/lumentum-holdings-inc.md>), [machine](<https://devfeed.tech/tags/machine.md>), [maskless-lithography](<https://devfeed.tech/tags/maskless-lithography.md>), [melton-chang](<https://devfeed.tech/tags/melton-chang.md>), [memory](<https://devfeed.tech/tags/memory.md>), [michael-hurlston](<https://devfeed.tech/tags/michael-hurlston.md>), [naveen-rao](<https://devfeed.tech/tags/naveen-rao.md>), [news](<https://devfeed.tech/tags/news.md>), [normal-computing-corp](<https://devfeed.tech/tags/normal-computing-corp.md>), [optical-interconnects](<https://devfeed.tech/tags/optical-interconnects.md>), [optical-networking](<https://devfeed.tech/tags/optical-networking.md>), [physical-ai](<https://devfeed.tech/tags/physical-ai.md>), [summit](<https://devfeed.tech/tags/summit.md>), [systems](<https://devfeed.tech/tags/systems.md>), [thecube](<https://devfeed.tech/tags/thecube.md>)

### AI overview

AI infrastructure is becoming a systems problem: processor performance depends on links, memory, storage and power working together, and each is developing its own bottlenecks. The summit highlights several responses: optical links and fiber to ease bandwidth and power constraints; CXL memory pooling and in-memory computation to address limited, costly memory; workload-specific racks and memory-centric accelerators for inference; and storage tiering as data volumes grow. It also describes maskless parallel e-beam lithography as an approach to advanced packaging, physics-based computing as an experimental path to lower-energy AI, and digital twins to manage rapid AI power swings. Siemens says its GPU-based design engines deliver 10-12-fold speedups and that AI agents automate setup and debugging while retaining deterministic design results. Supply and timing remain constraints: memory is reported sold out through 2028, optical demand exceeds capacity, and power infrastructure's six-to-ten-year cycles lag hardware that changes roughly annually.

### Source excerpt

Faster chips alone no longer define the AI buildout. Hundreds of thousands of processors now work together as one machine, so AI infrastructure hardware is designed and judged as a complete system. That system runs from the optical links between racks to the memory, storage and power that keep GPUs busy. The next phase will [...] The post 11 insights from the CASPA CEO Summit: AI infrastructure hardware becomes a systems game appeared first on SiliconANGLE.