# New-in-Llvm-3.1

Published articles for New-in-Llvm-3.1.

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## LLVM 3.1 vector changes

DevFeed: [LLVM 3.1 vector changes](<https://devfeed.tech/articles/llvm-3-1-vector-changes-42867.md>)

Original publisher: [Read original article](<https://blog.llvm.org/2011/12/llvm-31-vector-changes.html>)

Author: Nadav Rotem

Published: 2011-12-19T04:10:00Z

Content type: article

Language: en

Sources: [The LLVM Project Blog](<https://devfeed.tech/sources/the-llvm-project-blog.md>)

Topics: [LLVM](<https://devfeed.tech/topics/llvm.md>), [Compiler](<https://devfeed.tech/topics/compiler.md>), [compilers](<https://devfeed.tech/topics/compilers.md>), [OpenCL](<https://devfeed.tech/topics/opencl.md>), [implementation](<https://devfeed.tech/topics/implementation.md>), [data type](<https://devfeed.tech/topics/data-type.md>)

Tags: [code-generation](<https://devfeed.tech/tags/code-generation.md>), [compilers](<https://devfeed.tech/tags/compilers.md>), [data-type](<https://devfeed.tech/tags/data-type.md>), [implementation](<https://devfeed.tech/tags/implementation.md>), [intel](<https://devfeed.tech/tags/intel.md>), [llvm](<https://devfeed.tech/tags/llvm.md>), [llvm-ir](<https://devfeed.tech/tags/llvm-ir.md>), [new-in-llvm-3-1](<https://devfeed.tech/tags/new-in-llvm-3-1.md>), [opencl](<https://devfeed.tech/tags/opencl.md>), [optimization](<https://devfeed.tech/tags/optimization.md>), [vectorization](<https://devfeed.tech/tags/vectorization.md>)

### AI overview

This post explains LLVM 3.1 changes for compiling vector operations, focusing on vector-select and vectors-of-pointers. It describes how LLVM-IR vector types are translated into SIMD instructions, including SSE blends, through code-generation and type-legalization work.

### Source excerpt

Intel uses the Low-Level Virtual Machine (LLVM) in a number of products, including the Intel® OpenCL SDK. The SDK's implicit vectorization module generates LLVM-IR (intermediate representation) which uses vector types. LLVM-IR supports operations that use vector data types, and the LLVM code generator needs to do non-trivial work in order to efficiently compile vector operations into SIMD instructions. Recently, there were changes to the LLVM code generation that enabled better code generation for vector operations. In addition to many low level optimizations, this post talks about two major changes: the implementation of vector-select, and the support for vectors-of-pointers.The LLVM-IR select instructionThe LLVM IR 'select' instruction is used to choose one value based on a condition. If the condition evaluates to 'True', the instruction returns the first value argument; otherwise, it returns the second value argument. For example: %X = select i1 true, i8 17, i8 42 ; yields i8:17The 'select' instruction also supports vector data types, where the condition is a vector of boolean data type. If the condition is a vector of booleans (see above), then the selection is done per element. Vector-select instructions are very useful for vectorizing compilers, which use them to 'mask-out' inactive SIMD lanes. Until recently, the LLVM code generator did not support conditions with vector data types. Enabling them required enhancing several other areas of the code generator.SSE blendsIntel's SSE4.1 instruction set features the PBLENDVB instruction. This instruction selects byte values from registers XMM1 and XMM2, using a mask specified in the high bit of each byte in XMM0, and stores the values into XMM1. There are also other instructions for handling larger data types, such as 32-bit integers, etc. It may seem odd for the selector bits to be the high bit, but the vector-compare machine instructions also set the high bits, so that the compare and blend instructions can work t