# routing optimization

Published articles for routing optimization.

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## Reinforcement Learning Cuts Routing Violations in Dense Chip Layouts (NYU)

DevFeed: [Reinforcement Learning Cuts Routing Violations in Dense Chip Layouts (NYU)](<https://devfeed.tech/articles/reinforcement-learning-cuts-routing-violations-in-dense-chip-layouts-nyu-55473.md>)

Original publisher: [Read original article](<https://semiengineering.com/reinforcement-learning-cuts-routing-violations-in-dense-chip-layouts-nyu/>)

Author: Technical Paper Link

Published: 2026-09-19T18:54:29Z

Content type: article

Language: en

Sources: [Semiconductor Engineering](<https://devfeed.tech/sources/semiconductor-engineering.md>)

Topics: [Reinforcement learning](<https://devfeed.tech/topics/reinforcement-learning.md>), [Routing (disambiguation)](<https://devfeed.tech/topics/routing.md>), [iteration](<https://devfeed.tech/topics/iteration.md>)

Tags: [ai-ml-dl](<https://devfeed.tech/tags/ai-ml-dl.md>), [artificial-intelligence](<https://devfeed.tech/tags/artificial-intelligence.md>), [design-rule-violations](<https://devfeed.tech/tags/design-rule-violations.md>), [design-verification](<https://devfeed.tech/tags/design-verification.md>), [detailed-routing](<https://devfeed.tech/tags/detailed-routing.md>), [drv](<https://devfeed.tech/tags/drv.md>), [eda](<https://devfeed.tech/tags/eda.md>), [electronic-design-automation](<https://devfeed.tech/tags/electronic-design-automation.md>), [long-short-term-memory](<https://devfeed.tech/tags/long-short-term-memory.md>), [lstm](<https://devfeed.tech/tags/lstm.md>), [machine-learning](<https://devfeed.tech/tags/machine-learning.md>), [nyu](<https://devfeed.tech/tags/nyu.md>), [offline-reinforcement-learning](<https://devfeed.tech/tags/offline-reinforcement-learning.md>), [paper](<https://devfeed.tech/tags/paper.md>), [physical-design](<https://devfeed.tech/tags/physical-design.md>), [placement-density](<https://devfeed.tech/tags/placement-density.md>), [recurrent-neural-networks](<https://devfeed.tech/tags/recurrent-neural-networks.md>), [reinforcement-learning](<https://devfeed.tech/tags/reinforcement-learning.md>), [rl](<https://devfeed.tech/tags/rl.md>), [routing-optimization](<https://devfeed.tech/tags/routing-optimization.md>), [semiconductor](<https://devfeed.tech/tags/semiconductor.md>), [semiconductor-research](<https://devfeed.tech/tags/semiconductor-research.md>), [technical-papers](<https://devfeed.tech/tags/technical-papers.md>)

### AI overview

Researchers at New York University published a technical paper on using a history-aware offline reinforcement-learning policy with LSTM to predict routing cost weights and improve convergence in dense chip layouts.

### Source excerpt

Researchers at New York University published a technical paper titled "Routing Dense Layouts with History-Aware Offline Reinforcement Learning using LSTM." Abstract Excerpt: "Detailed routing remains a dominant runtime bottleneck in physical design due to increasing complexity of design rules. Modern routers can struggle to resolve persistent violations under dense operating conditions. While recent work leverages... " read more The post Reinforcement Learning Cuts Routing Violations in Dense Chip Layouts (NYU) appeared first on Semiconductor Engineering.