# Specifications Published articles for Specifications. This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles. ## How to Identify Which Raspberry Pi Model You Have DevFeed: [How to Identify Which Raspberry Pi Model You Have]() Original publisher: [Read original article]() Author: Patrick Fromaget Published: 2026-09-17T02:25:39Z Content type: tutorial Language: en Sources: [RaspberryTips]() Topics: [Raspberry Pi](), [Operating system](), [cpu](), [Wi-Fi]() Tags: [beginner-s-guides](), [cpu](), [how-to](), [install](), [raspberry-pi](), [specifications](), [system](), [wi-fi]() ### AI overview A practical guide to identifying which Raspberry Pi model you own. It covers physical markings, purchase records, system commands, model comparisons, and a flowchart, with examples including Raspberry Pi 1, Raspberry Pi 2, and Raspberry Pi Zero. ### Source excerpt You bought a Raspberry Pi a few months or years ago and have no idea what model you have. This is a problem because you'll need this information to order accessories or install a new operating system. No worries, I'll give you tips on how to find which one you have easily. Most Raspberry Pi... ## AAEON MIX-PTLWV1 Panther Lake industrial mini-ITX motherboard offers quad DisplayPort, dual 10GbE, and more DevFeed: [AAEON MIX-PTLWV1 Panther Lake industrial mini-ITX motherboard offers quad DisplayPort, dual 10GbE, and more]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-16T12:00:59Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Embedded Systems](), [intel](), [Intel Core](), [ddr5](), [M.2 NVMe](), [pcie](), [Graphics](), [Specifications]() Tags: [10gbe](), [2-5gbe](), [4g-lte](), [5g](), [aaeon](), [artificial-intelligence-ai](), [automotive](), [ddr5](), [graphics](), [hardware](), [industrial](), [intel-core](), [linux](), [m-2-nvme](), [mini-itx](), [motherboard](), [nvme](), [panther-lake](), [pcie](), [single-board-computer](), [smart-city](), [specifications](), [ubuntu](), [windows-11]() ### AI overview CNX Software reports on the AAEON MIX-PTLWV1, an industrial mini-ITX motherboard built around Intel Core Ultra Series 3 Panther Lake processors. It supports up to 128GB of DDR5 memory, NVMe storage, four DisplayPort outputs, optional wireless and cellular modules, multiple Ethernet ports including up to two 10GbE connections, serial interfaces, and PCIe expansion. ### Source excerpt AAEON MIX-PTLWV1 is an industrial mini-ITX motherboard based on Intel Core Ultra Series 3 "Panther Lake" processors with up to two 10GbE and two 2.5GbE RJ45 jacks, and four 4K-capable DisplayPort video outputs. The motherboard also supports up to 128GB DDR5 C/SO-DIMM memory, M.2 NVMe SSD storage, optional WiFi and Bluetooth, and/or 4G LTE/5G cellular via M.2 modules, a PCIe Gen4 x8 slot for expansion, six serial interfaces, 12V-24V wide DC input, and more. AAEON MIX-PTLWV1 specifications: SoC - Intel Panther Lake processor (PTL-H404/PTL-H484 families) with Intel Xe LPG graphics; TDP: 15 to 25W System Memory - Up to 128GB via 2x 262-pin DDR5 C/SO-DIMM sockets up to 6400MHz (H404 SKU) or 7200MHz (H484 SKU) Storage - M.2 2280 M-Key (PCIe Gen4 x4) socket for NVMe SSD Display Interfaces 4x DisplayPort 1.4 up to 4096 x 2160 @ 60Hz 40-pin LVDS/eDP co-layout connector for Default: 18/24 bit dual-channel LVDS up [...] The post AAEON MIX-PTLWV1 Panther Lake industrial mini-ITX motherboard offers quad DisplayPort, dual 10GbE, and more appeared first on CNX Software - Embedded Systems News. ## Alif Semi Balletto B1 and Ensemble E1C StartKits feature Cortex-M55 + Ethos-U55 MCU for IoT and Edge AI DevFeed: [Alif Semi Balletto B1 and Ensemble E1C StartKits feature Cortex-M55 + Ethos-U55 MCU for IoT and Edge AI]() Original publisher: [Read original article]() Author: Debashis Das Published: 2026-09-15T09:00:06Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Microcontrollers](), [Embedded Systems](), [Microcontroller](), [cpu](), [Internet of things](), [Artificial Intelligence](), [SDK]() Tags: [802-15-4](), [ai](), [alif](), [ble](), [camera](), [core](), [debugger](), [development-board](), [devkit](), [edge](), [edge-ai](), [embedded-systems](), [hardware](), [i2c](), [iot](), [led](), [low-power](), [mcu](), [microcontrollers](), [mikrobus](), [open-source](), [sensor](), [specifications](), [testing](), [zephyr](), [zephyr-os]() ### AI overview Alif Semiconductor's Balletto B1 and Ensemble E1C StartKits are low-cost development boards built around Cortex-M55 microcontrollers with Ethos-U55 NPUs. The Balletto B1 adds BLE 5.3 and 802.15.4 connectivity, while both boards include camera, audio, sensor expansion, debugging, and power-measurement features. ### Source excerpt Alif Semiconductor's Ensemble E1C (SK-E1C) and Balletto B1 (SK-B1) StartKits are low-cost development boards built around the company's Cortex-M55 + Ethos-U55 microcontrollers. The Balletto B1 adds BLE 5.3 and 802.15.4 wireless connectivity, while the Ensemble E1C does not have built-in wireless connectivity. Both StartKits feature a microcontroller with a 160MHz Cortex-M55 CPU, an Ethos-U55 NPU, 2MB SRAM, and 1.8/1.9MB NVM. They also include an Arducam camera header, a mikroBUS Click Board expansion socket, and two PDM microphones for camera, audio, and sensor-based projects. The Balletto B1 additionally provides the complete RF path to a chip antenna for its wireless subsystem, while both boards feature an on-board Segger J-Link debugger for development and testing. Alif Semiconductor StartKit (SK-B1 and SK-E1C) specifications: MCU SK-E1C - Alif Semiconductor Ensemble E1C SK-B1 - Alif Semiconductor Balletto B1 CPU - Arm Cortex-M55 core with Helium-M Vector Extension @ up to 160 MHz NPU - Arm [...] The post Alif Semi Balletto B1 and Ensemble E1C StartKits feature Cortex-M55 + Ethos-U55 MCU for IoT and Edge AI appeared first on CNX Software - Embedded Systems News. ## Arduino UNO Media Carrier adds MIPI CSI/DSI and audio connectors to UNO Q and VENTUNO Q boards DevFeed: [Arduino UNO Media Carrier adds MIPI CSI/DSI and audio connectors to UNO Q and VENTUNO Q boards]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-10T00:00:32Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [UNO Q](), [Arduino](), [Raspberry Pi](), [Hardware](), [Open Source]() Tags: [arduino](), [audio](), [camera](), [connectors](), [display](), [embedded-systems](), [hardware](), [linux](), [mipi](), [mipi-csi](), [news](), [open-source](), [single-board-computer](), [specifications](), [touchscreen](), [uno-q](), [ventuno-q](), [waveshare]() ### AI overview The Arduino UNO Media Carrier adds accessible 22-pin MIPI DSI and CSI connectors, three 3.5 mm audio jacks, and RGB LEDs to Arduino UNO Q and VENTUNO Q boards. It is listed at $19.25 or EUR 19.89 including VAT. ### Source excerpt Arduino UNO Media Carrier board adds three audio jacks, a MIPI DSI display connector, two MIPI CSI camera connectors, and a few RGB LEDs to the Arduino UNO Q and Arduino VENTUNO Q SBCs. Both Arduino "Q" boards already expose MIPI CSI/DSI and audio interfaces, but only through the JMEDIA and JMISC 60-pin headers, which aren't very convenient. The Arduino UNO Media Carrier board fixes that with 22-pin MIPI connectors and 3.5 audio jacks. Arduino UNO Media Carrier (ASX00083) specifications: Compatible SBCs - Arduino UNO Q and Arduino VENTUNO Q Display I/F - 22-pin MIPI DSI connector compatible with standard MIPI-DSI display modules (5-inch, 8-inch, 10.1-inch Waveshare touch display compatible) Camera I/F - 2x 22-pin MIPI-CSI connectors compatible with IMX219 camera modules like the Raspberry Pi Camera Module 2 Audio 3.5 mm (MIC-IN/Headphones Out) audio jack 3.5mm Line Out audio jack 3.5mm Ear Out audio jack Host interfaces 60-pin female [...] The post Arduino UNO Media Carrier adds MIPI CSI/DSI and audio connectors to UNO Q and VENTUNO Q boards appeared first on CNX Software - Embedded Systems News. ## YuzukiNeko - A Linux-capable Allwinner F101 RISC-V SBC with Raspberry Pi Pico form factor DevFeed: [YuzukiNeko - A Linux-capable Allwinner F101 RISC-V SBC with Raspberry Pi Pico form factor]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-07T17:01:57Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Raspberry Pi](), [Linux](), [RISC-V](), [Hardware](), [SOC](), [Embedded Systems](), [Open Source](), [Kernel](), [Software]() Tags: [allwinner](), [allwinner-d-series](), [buildroot](), [cpu](), [embedded-systems](), [gpio](), [hardware](), [linux](), [linux-7-x](), [mipi](), [open-source](), [psram](), [raspberry-pi](), [risc-v](), [single-board-computer](), [specifications](), [spi](), [storage](), [usb](), [zephyr](), [zephyr-os]() ### AI overview YuzukiHD has introduced YuzukiNeko, a Raspberry Pi Pico-sized open-source single-board computer built around the Allwinner F101 RISC-V SoC. It includes a 1.008 GHz C907 core, 8MB or 16MB PSRAM, SPI NOR flash, microSD storage, USB-C, and GPIO expansion, with support for Linux, Buildroot, and Zephyr RTOS. ### Source excerpt YuzukiHD has made another open-source hardware Linux SBC. YuzukiNeko is a Raspberry Pi Pico-sized single board computer powered by a new Allwinner F101 RISC-V SoC. The Allwinner F101 processor features a single 1.008 GHz C907 RISC-V core, 8MB or 16 MB PSRAM, and support for various display interfaces such as MIPI DSI, 24-bit RGB, and LVDS. The YuzukiNeko board itself features the F101 SoC, an SPI NOR flash, a microSD card for storage, a USB-C port, and two 20-pin GPIO headers. YuzukiNeko specifications: SoC - Allwinner F101 CPU - T-head C907 RISC-V core up to 1.008 GHz Memory - 8MB or 16MB PSRAM @ 252 MHz Package - QFN-68 Storage 128 Mbit NOR flash (PY25Q128HA-SUH-IT) MicroSD card slot USB - USB Type-C port for data, power, and programming Expansion 2x 20-pin expansion headers with GPIOs, ADC, 5V, 3.3V, and GND 5x pads with HP out (analog speaker output) and four [...] The post YuzukiNeko - A Linux-capable Allwinner F101 RISC-V SBC with Raspberry Pi Pico form factor appeared first on CNX Software - Embedded Systems News. ## Client-Side SDK Generation with VMware Cloud Foundation OpenAPI Specs DevFeed: [Client-Side SDK Generation with VMware Cloud Foundation OpenAPI Specs]() Original publisher: [Read original article]() Author: vmwareblogs Published: 2026-09-07T09:38:44Z Content type: tutorial Language: en Sources: [VMware Blogs]() Topics: [OpenAPI Specification](), [SDKs](), [.NET](), [C#](), [developer tooling](), [Java](), [Python](), [PowerShell]() Tags: [apis](), [cli](), [cloud](), [cloud-infrastructure](), [csharp](), [developer](), [developer-tooling](), [docker](), [home-page](), [java](), [net](), [openapi](), [powershell](), [programming](), [programming-language](), [python](), [rest](), [rest-api](), [sdk](), [specifications](), [vcf-9-0](), [vcf-9-1](), [vcf-sdk]() ### AI overview This guide explains how to generate a strongly typed .NET C# client SDK from VMware Cloud Foundation and vSphere OpenAPI specifications. It covers OpenAPI Generator, installation options, large specification handling, API-surface scoping, and the REST and JSON-RPC interfaces targeted by the example. ### Source excerpt Starting with VMware Cloud Foundation (VCF) 9.0, VMware officially publishes OpenAPI specifications for VCF APIs. This is a major milestone for developers, enabling you to consume VCF APIs using your programming language of choice. VMware provides first-class developer tooling such as VCF PowerCLI for PowerShell users and the VCF SDK offering Java and Python bindings. ... Continued The post Client-Side SDK Generation with VMware Cloud Foundation OpenAPI Specs appeared first on VMware Blogs. ## Amlogic A311Y3 Cortex-A78/A55 Edge AI system-on-module delivers up to 8 TOPS DevFeed: [Amlogic A311Y3 Cortex-A78/A55 Edge AI system-on-module delivers up to 8 TOPS]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-03T13:46:18Z Content type: article Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Embedded Systems](), [Artificial Intelligence](), [cpu](), [SOC](), [GPU](), [RISC-V](), [SDK](), [Android](), [Linux]() Tags: [2025](), [4g-lte](), [amlogic](), [android](), [arm](), [boardcon](), [camera](), [compiler](), [cortex-a55](), [cortex-a78](), [cpu](), [development-board](), [development-tools](), [display](), [edge-ai](), [edge-computing](), [embedded](), [embedded-systems](), [hardware](), [linux](), [npu](), [opencl](), [risc-v](), [rs485](), [som](), [specifications](), [vulkan]() ### AI overview The article examines Boardcon's CM311Y3 system-on-module, which uses the Amlogic A311Y3 octa-core SoC with Cortex-A78 and Cortex-A55 CPUs, an 8 TOPS NPU, LPDDR5 memory, eMMC storage, and interfaces for embedded applications. It also describes the module's development board, software support, and key specifications. ### Source excerpt Boardcon CM311Y3 system-on-module (SoM) is powered by an Amlogic A311Y3 octa-core Cortex-A78/A55 SoC with an 8 TOPS NPU and targets 4K video surveillance systems, AI edge computing devices, interactive terminals, enterprise thin clients, and autonomous robots. The module comes with up to 16GB LPDDR5 and up to 256 GB eMMC flash, exposes 210 pins through castellated edges, and a development board is also provided for evaluation and early software development. We don't often see new SoMs or SBCs based on Amlogic SoCs these days, so let's have a closer look. Boardcon CM311Y3 System-on-Module CM311Y3 specifications: SoC - Amlogic A311Y3 CPU 2x ARM Cortex-A78 cores @ 2.4GHx 6x ARM Cortex-A55 cores @ 2.0GHz RISC-V core for system control processing RISC-V core for Always-on power management and Sensor Hub GPU - Arm Mali-G625 MC1 with support for OpenGL ES 3.2, Vulkan 1.4, and OpenCL 3.0 VPU Video Decoder - H.264 up to [...] The post Amlogic A311Y3 Cortex-A78/A55 Edge AI system-on-module delivers up to 8 TOPS appeared first on CNX Software - Embedded Systems News. ## Artery AT32F406 and AT32F408 Cortex-M4F MCUs feature optional high-speed USB OTG PHY DevFeed: [Artery AT32F406 and AT32F408 Cortex-M4F MCUs feature optional high-speed USB OTG PHY]() Original publisher: [Read original article]() Author: Debashis Das Published: 2026-09-03T09:40:39Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Microcontroller](), [Embedded Systems](), [Arm](), [USB](), [Internet of things](), [cpu](), [Hardware]() Tags: [arm](), [boot](), [bootloader](), [c-c-plus-plus](), [cortex-m4](), [cpu](), [development-board](), [embedded](), [embedded-systems](), [hardware](), [industrial](), [iot](), [mcu](), [microcontrollers](), [processors](), [specifications](), [usb]() ### AI overview The article describes Artery Technology's AT32F406 and AT32F408 Arm Cortex-M4F microcontrollers, which run at up to 216 MHz. The AT32F408 adds USB 2.0 OTG High-Speed support with an integrated PHY, while both devices provide DSP and floating-point capabilities, configurable memory options, QSPI, and a range of digital and analog peripherals. ### Source excerpt Artery Technology AT32F406 and AT32F408 are two new Arm Cortex-M4F MCUs running at up to 216 MHz, with the F408 adding USB OTG High-Speed and an integrated PHY for industrial automation, IoT, USB accessories, and gaming peripherals. The AT32F406/F408 series both offer DSP instructions and a floating-point unit (FPU), integrate up to 512 KB Flash and 192 KB SRAM, and a 4 KB OTP memory for critical data and parameters. The microcontrollers also offer a QSPI interface for external Flash or RAM expansion, and a range of digital and analog peripheral interfaces. Artery AT32F406/AT32F408 specifications: MCU - 32-bit Arm Cortex-M4F CPU up to 216 MHz; also features Memory Protection Unit (MPU) and DSP instructions Memory/Storage 128 KB to 192 KB SRAM 256 KB to 512 KB Flash memory 26 KB boot memory (configurable as a bootloader or general instruction/data memory) 4 KB OTP (one-time programmable) memory QSPI interface for external SPI [...] The post Artery AT32F406 and AT32F408 Cortex-M4F MCUs feature optional high-speed USB OTG PHY appeared first on CNX Software - Embedded Systems News. ## D-Robotics RDK S100P - A 128 TOPS alternative to NVIDIA Jetson Orin NX 16GB with Cortex-A78AE/R52+ cores DevFeed: [D-Robotics RDK S100P - A 128 TOPS alternative to NVIDIA Jetson Orin NX 16GB with Cortex-A78AE/R52+ cores]() Original publisher: [Read original article]() Author: Debashis Das Published: 2026-08-31T08:06:13Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Jetson](), [Robotics](), [Embedded Systems](), [Microcontroller](), [Jetson Orin](), [SOC](), [cpu](), [Arm](), [real-time](), [GPU](), [Linux](), [Nvidia]() Tags: [arm](), [artificial-intelligence-ai](), [camera](), [computer-vision](), [cortex-a78](), [cpu](), [deep-learning](), [development-kit](), [dfrobot](), [edge-ai](), [embedded](), [embedded-systems](), [gpu](), [hardware](), [jetson](), [jetson-orin](), [linux](), [mcu](), [networking](), [nvidia](), [os](), [processors](), [real-time](), [robotics](), [ros](), [safety](), [sensor](), [sensors](), [single-board-computer](), [soc](), [software](), [som](), [specifications](), [systems](), [ubuntu]() ### AI overview The D-Robotics RDK S100P is a robotics single-board computer featuring a 6-core Cortex-A78AE CPU, 4-core Cortex-R52+ MCU domain, 128 TOPS INT8 Nash BPU, Mali-G78AE GPU, and 24 GB of LPDDR5. Its MCU supports real-time motor and sensor control, potentially reducing the need for a separate real-time controller depending on the robot's requirements. ### Source excerpt D-Robotics RDK S100P development kit is a robotics SBC built around an S100P-based module providing an alternative to NVIDIA Jetson Orin NX 16GB with a 6-core Cortex-A78AE application cluster, a 4-core Cortex-R52+ MCU domain, a Nash BPU rated at 128 TOPS INT8, a Mali-G78AE GPU, and 24 GB of LPDDR5. The four R52+ cores can be configured for reliable real-time control: two cores run in lockstep for safety, and the other two support split-lock operation. In practice, the A78AE CPU and BPU can handle Linux and vision processing, while the MCU handles time-critical tasks such as motor and sensor I/O. This can reduce the need for a separate real-time controller, although whether it eliminates one depends on the robot and its requirements. RDK S100P specifications: SoC - D-Robotics S100P CPU - 6x Arm Cortex-A78AE @ 2.0 GHz (safety-capable AE cores) MCU - 4x Arm Cortex-R52+ @ 1.2 GHz (1x DCLS [...] The post D-Robotics RDK S100P - A 128 TOPS alternative to NVIDIA Jetson Orin NX 16GB with Cortex-A78AE/R52+ cores appeared first on CNX Software - Embedded Systems News. ## Orange Pi Zero 4 - Compact Allwinner A733 SBC offers HDMI, USB-C DP, GbE, WiFI 6, PCIe FFC connector for $26.5 and up DevFeed: [Orange Pi Zero 4 - Compact Allwinner A733 SBC offers HDMI, USB-C DP, GbE, WiFI 6, PCIe FFC connector for $26.5 and up]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-08-31T07:13:46Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Embedded Systems](), [SOC](), [Arm](), [cpu](), [wifi 6](), [GPU](), [Bluetooth](), [RISC-V](), [hdmi](), [USB](), [Ethernet](), [OpenGL]() Tags: [allwinner](), [allwinner-a-series](), [android](), [arm](), [armbian](), [bluetooth](), [cortex-a55](), [cpu](), [debian](), [embedded-systems](), [gigabit-ethernet](), [gpu](), [h-264](), [hardware](), [hdmi](), [linux](), [npu](), [opencl](), [orange-pi](), [pcie](), [single-board-computer](), [specifications](), [ubuntu](), [usb](), [vp9](), [vulkan](), [wifi-6]() ### AI overview The Orange Pi Zero 4 is a compact single-board computer based on the Allwinner A733, with up to 8GB of memory, eMMC or UFS storage support, mini HDMI, USB-C DisplayPort, Gigabit Ethernet, Wi-Fi 6, Bluetooth 5.4, camera interfaces, GPIO, and a PCIe FFC connector. The article lists its specifications, planned operating-system images, and expected Armbian support. ### Source excerpt Orange Pi Zero 4 is an affordable yet feature-rich Allwinner A733 single board computer (SBC) with up to 8GB RAM, eMMC/UFS storage footprint, a microSD card slot, and plenty of I/Os. The board packs mini HDMI and USB-C DisplayPort, Gigabit Ethernet, WiFi 6 and Bluetooth 5.4, two MIPI CSI camera connectors, a Raspberry Pi-style PCIe FFC connector, and two GPIO headers into a compact 55x50mm form factor. Orange Pi Zero 4 specifications: SoC - Allwinner A733 CPU Dual-core Arm Cortex-A76 @ up to 2.00 GHz Hexa-core Arm Cortex-A55 @ up to 1.79 GHz Single-core RISC-V E902 real-time core up to 200 MHz GPU - Imagination Technologies BXM-4-64 MC1 GPU with support for OpenGL ES 3.2, Vulkan 1.3, OpenCL 3.0 VPU 8Kp24 H.265/VP9/AVS2 decoding 4Kp30 H.265/H.264 encoding AI accelerator - 3 TOPS NPU System Memory - 1GB, 2GB, 4GB, 6GB, or 8GB LPDDR5/LPDDR4/LPDDR4x; note: 16GB is also listed in the specs, [...] The post Orange Pi Zero 4 - Compact Allwinner A733 SBC offers HDMI, USB-C DP, GbE, WiFI 6, PCIe FFC connector for $26.5 and up appeared first on CNX Software - Embedded Systems News. ## Designing Libraries and SDKs for Human Developers and Coding Agents DevFeed: [Designing Libraries and SDKs for Human Developers and Coding Agents]() Original publisher: [Read original article]() Author: CommonsWare Published: 2026-08-22T17:08:47Z Content type: opinion Language: en Sources: [The CommonsBlog]() Topics: [SDKs](), [AI-assisted coding](), [Agentic development](), [Documentation](), [test](), [Specifications]() Tags: [agentic](), [blog](), [coding-agents](), [documentation](), [open-source](), [sdk](), [sdks](), [specifications](), [tests]() ### AI overview This opinion article argues that library and SDK authors should support both human developers and coding agents. It recommends clear source-code comments, generated API documentation, robust and runnable test suites, coverage analysis, and language-neutral specifications with conformance tests to clarify intended behavior and support faithful ports. ### Source excerpt Let's explore how we can succeed with libraries and SDKs at a time when coding agents will be consuming what we create, as will ordinary developers ## Sandisk 600 and 800 NAS SSDs Revealed DevFeed: [Sandisk 600 and 800 NAS SSDs Revealed]() Original publisher: [Read original article]() Author: Rob Andrews Published: 2026-08-20T12:00:27Z Content type: news Language: en Sources: [NAS Compares]() Topics: [Hardware](), [NVMe](), [M.2 NVMe](), [Specifications]() Tags: [asustor-ssd](), [m-2-nvme](), [nas-600](), [nas-800](), [nas-drive-ssd](), [nas-hardware](), [nas-ssd](), [network-attached-storage-nas](), [nvme](), [qnap-ssd](), [sandisk](), [sandisk-1000](), [sandisk-200](), [sandisk-2026](), [sandisk-2027](), [sandisk-400](), [sandisk-600](), [sandisk-800](), [sandisk-nas-600](), [sandisk-nas-800](), [sandisk-nas-ssd](), [sandisk-ssd](), [specifications](), [ssd](), [ssd-for-nas](), [ssd-nas-drive](), [synology-ssd](), [ugreen-ssd](), [uncategorised](), [wd-2026](), [wd-2027](), [wd-nas-ssd](), [wd-red-nas-ssd](), [wd-red-ssd]() ### AI overview Sandisk has introduced the NAS 600 and NAS 800 SSD families for NAS systems. The NAS 600 is a 2.5-inch SATA SSD for storage and all-flash arrays, while the NAS 800 is an M.2 2280 PCIe 5.0 NVMe SSD for caching, tiered storage and primary storage in compatible systems. ### Source excerpt New SSDs for NAS Released by Sandisk - Too late? Sandisk has introduced 2 SSD families designed specifically for NAS use, covering both conventional 2.5-inch SATA storage and higher-performance M.2 NVMe applications. The SANDISK NAS 600 and NAS 800 series are intended for prosumers, creative professionals and small businesses using always-on systems for shared storage, [...] ## Xiaomi Smart Storage NAS Revealed DevFeed: [Xiaomi Smart Storage NAS Revealed]() Original publisher: [Read original article]() Author: Rob Andrews Published: 2026-08-03T16:00:11Z Content type: article Language: en Sources: [NAS Compares]() Topics: [Hardware](), [Specifications](), [QNAP](), [Synology]() Tags: [2-bay-nas](), [capacity](), [china](), [consumer](), [crowdfunding](), [hardware](), [home-nas](), [hyperos](), [launch](), [leak](), [nas](), [nas-2026](), [nas-news](), [network-attached-storage-nas](), [news](), [news-2026](), [private-cloud](), [product](), [qnap](), [qnap-2026](), [qnap-alternative](), [qnap-news](), [realtek-rtd1619b](), [specifications](), [storage](), [synology](), [synology-2026](), [synology-alternative](), [synology-news](), [uncategorised](), [xiaomi](), [xiaomi-nas](), [xiaomi-smart-storage](), [xiaomi-youpin]() ### AI overview Xiaomi Smart Storage is a two-bay consumer NAS launched in China through Xiaomi Youpin crowdfunding. The article describes its family-focused storage use cases, bundled-drive pricing, and leaked engineering-sample hardware specifications, while distinguishing official details from unconfirmed specifications. ### Source excerpt Xiaomi has now officially moved into the home NAS market with Xiaomi Smart Storage, a two-bay consumer storage box that is being launched in China through Xiaomi Youpin crowdfunding. The product is being positioned less like a traditional enthusiast NAS and more like a family storage appliance for phone backup, photo management, files, and home [...] ## Which Doc Format is Best for AI Specifications? DevFeed: [Which Doc Format is Best for AI Specifications?]() Original publisher: [Read original article]() Author: Peter Lawrey (noreply@blogger.com) Published: 2026-07-14T14:00:28Z Content type: article Language: en Sources: [Vanilla Java]() Topics: [Specifications](), [Markdown](), [Fable](), [HTML](), [Documentation]() Tags: [ai](), [fable](), [html](), [info](), [markdown](), [readability](), [specifications]() ### AI overview The article compares Markdown, AsciiDoc, and HTML for AI specifications using document-size, markup-overhead, readability, and editing-workflow observations. It recommends Markdown for AI working documents, AsciiDoc for curated human-reviewed specifications, and HTML primarily as a publishing target. ### Source excerpt I have a Spec Driven Project with 674 documents incl 181 specs, 429 tasks, and 40 project docs. About 1/3 of these are an acceptance sub-project to show the root project meets fit-for-purpose requirements. I used Fable to convert these to and from AsciiDoc, Markdown, and HTML. From this, I tried to draw some conclusions about which format is better than the others for AI specifications. TL;DR: Markdown for AI working documents, AsciiDoc for curated human-reviewed specs, HTML only as a publishing target. Objective Metrics Corpus Tokens (Approx) Markdown: 594k, AsciiDoc: 598K, HTML: 661k Worst Single-File Ratio AsciiDoc: 1.023x, HTML: 1.26x (due to tables and code blocks) Markup share of file content Markdown 0.9%, AsciiDoc 1.3%, HTML 9.9% - a 10x overhead for HTML Read/write Assessment In terms of readability, both Markdown and AsciiDoc are good. HTML has far more tags, which add noise. One of the most common tags is some code however in the other formats, this is just `some code` When you have an average of 16 per file, this adds a lot of noise. Usability GitHub renders both Markdown and AsciiDoc with working links and checkboxes; HTML is shown as raw source, so the review loop dies there. The first two are also easier to view while you're editing in IntelliJ. HTML is more difficult to read and edit, and it is not as easy to view the rendered output. If you occasionally need HTML, you don't need HTML files: embed an island with ```{=html} in Markdown (Pandoc raw-attribute syntax) or in AsciiDoc. It renders where HTML is supported and drops out cleanly elsewhere. If you really need to use HTML, you can include a link to a file in that format. Note As these were one-for-one conversions, I didn't use features that only exist in AsciiDoc or HTML, such as. Markdown vs AsciiDoc While you might choose either format for your specs, I have been following this convention to keep the authoring consistent. Markdown used for AI-generated content, not human-written, ## Using Gherkin to Document Behavioral Equivalence in RPG Migrations DevFeed: [Using Gherkin to Document Behavioral Equivalence in RPG Migrations]() Original publisher: [Read original article]() Author: Federico Tomassetti Published: 2026-07-14T06:24:03Z Content type: article Language: en Sources: [Federico Tomassetti]() Topics: [migration](), [Testing](), [Mainframe]() Tags: [legacy-modernization](), [mainframe](), [migration](), [rpg](), [specifications](), [testing]() ### AI overview The article argues that Gherkin can make RPG migration testing auditable to business stakeholders by expressing undocumented business rules in a readable form. It presents behavioral equivalence and stakeholder sign-off as more important migration outcomes than test coverage alone. ### Source excerpt Everyone benchmarks RPG migration test suites on coverage. That's the wrong metric -- the real deliverable is behavioral equivalence a non-programmer will sign off on, and Gherkin is the only format the people who actually know the rules can read. The post Why Gherkin Is the Right Testing Tool for RPG Migration -- And It Has Nothing to Do With BDD appeared first on Federico Tomassetti. ## OpenTelemetry is a CNCF Graduated Project DevFeed: [OpenTelemetry is a CNCF Graduated Project]() Original publisher: [Read original article]() Author: OpenTelemetry Authors; Docs CC BY Published: 2026-05-21T14:27:48Z Content type: release Language: en Sources: [Blog on OpenTelemetry]() Topics: [OpenTelemetry](), [observability](), [Cloud Native Ecosystem](), [Maintainers](), [SDKs]() Tags: [cloud-native](), [cncf](), [community](), [contributors](), [observability](), [opentelemetry](), [sdks](), [specifications]() ### AI overview The Cloud Native Computing Foundation announced that OpenTelemetry has graduated. The article presents the graduation as a milestone reflecting the strength of the project's community and ecosystem, and describes its continued commitment to interoperable observability standards and tooling for cloud native software. ### Source excerpt Today, the Cloud Native Computing Foundation (CNCF) announced that OpenTelemetry has graduated. Graduation is an important milestone for the project and reflects the strength of the OpenTelemetry community and ecosystem. Since the merger of OpenTracing and OpenCensus, thousands of contributors, maintainers, end users, and organizations have helped shape OpenTelemetry into an open, vendor-neutral observability framework used across the industry. This milestone belongs to the community. We want to thank everyone who has contributed code, documentation, specifications, language SDKs, semantic conventions, bug reports, reviews, community support, advocacy, and end-user experiences. OpenTelemetry exists because of the people who continue to invest their time and expertise in the project every day. ## A year of open collaboration: Celebrating the anniversary of A2A DevFeed: [A year of open collaboration: Celebrating the anniversary of A2A]() Original publisher: [Read original article]() Author: Google Open Source (noreply@blogger.com) Published: 2026-04-16T20:55:00Z Content type: opinion Language: en Sources: [Google Open Source Blog]() Topics: [A2A protocol](), [Artificial Intelligence](), [Google](), [interoperability](), [Open Source](), [linux foundation](), [Security](), [Load Balancing]() Tags: [a2a](), [a2a-protocol](), [a2april](), [agent2agent](), [agents](), [ai](), [ai-agents](), [amazon](), [amazon-web-services](), [cisco](), [cryptographic](), [interoperability](), [linux-foundation](), [load-balancing](), [microsoft](), [open-source](), [sap](), [security](), [specifications](), [standard]() ### AI overview Google reflects on the first year of the Agent2Agent (A2A) protocol, including its donation to the Linux Foundation, the growth of its supporting ecosystem, and the release of A2A Protocol v1.0. The article highlights security, enterprise architecture, and interoperability improvements for multi-agent workflows. ### Source excerpt by Patricia Cruz, Google Open Source One year ago, on April 9th, 2025 Google announced the Agent2Agent(A2A) protocol. We saw the need for a "common language" that allows AI agents built on different frameworks to collaborate well across diverse systems. Then, on June 23, 2025 at the Open Source Summit North America in Denver, Mike Smith stood on stage to share a pivotal moment for the future of AI interoperability when Google officially donated the A2A protocol to the Linux Foundation, establishing it as a vendor-neutral, community-governed standard. This move was driven by a core belief: for AI agents to truly transform how we work and live, they must be able to communicate across framework boundaries and organizational silos without being locked into a single provider's ecosystem. By placing A2A under the neutral stewardship of the Linux Foundation, we opened the doors for the entire industry to build, contribute, and innovate together. A Foundation of Partners The formation of the A2A Project was made possible through the support of our founding members, including Amazon Web Services, Cisco, Microsoft, Salesforce, SAP, and ServiceNow. Over the past twelve months, this coalition has grown, with over 100 technology companies now supporting the project. From Prototype to Production The momentum since the donation has been remarkable. What began as a Google-led initiative has evolved into critical infrastructure for horizontal, peer-to-peer collaboration. Just one month ago, in March, the project reached a major milestone with the release of A2A Protocol v1.0, the first stable, fully production-ready version of the standard. Key achievements from the community this year include: Enhanced Security: The implementation of Signed Agent Cards for cryptographic identity verification, ensuring trust in multi-agent workflows. Web-Aligned Architecture: Refined specifications that support familiar load-balancing and security patterns for enterprise-scale deployments. Ecosystem ## A sufficiently comprehensive spec is not (necessarily) code DevFeed: [A sufficiently comprehensive spec is not (necessarily) code]() Original publisher: [Read original article]() Author: Hillel Wayne Published: 2026-04-15T16:18:02Z Content type: opinion Language: en Sources: [Newsletter feed for Hillel Wayne's Newsletter]() Topics: [Specifications](), [implementation](), [Claude Code](), [Code](), [Large Language Model]() Tags: [claude-code](), [code](), [implementation](), [llms](), [specifications]() ### AI overview The article argues that a sufficiently comprehensive specification is not necessarily code. A specification describes a set of possible implementations, while code is one implementation within that set; even specifications used with Claude Code can leave important design decisions unresolved. ### Source excerpt Sorry for missing last week! Was sick and then busy. This week I want to cover a pet peeve of mine, best seen in this comic: A "comprehensive and precise spec" is not necessarily code. A specification corresponds to a set of possible implementations, and code is a single implementation in that set. As long as the set has more than one element, there is a separation between the spec and the code. Consider a business person (bp) who asks: I want a tool to convert miles to kilometers. Is this a comprehensive spec? Maybe, you can give it to Claude Code and tell it to make all design decisions and it will give you a program that converts miles to km. At the same time, there is a huge amount of details left out of this. What language? What's the UX? Should it be a command line script or a mobile app or an enterprise SaaS? For this reason, if we gave Claude's output to the bp, they'll probably be unsatisfied. The set of possible implementations includes the programs they want, but also lots of programs they don't want. So they now they say: It should be a textbox on a website. Okay, this rules out a lot more stuff, but there's still a lot to decide. React or vanillajs or htmx? Should the output be a separate textbox or a popup? Should we use a conversion of 1.6, 1.61, or 1.609? So you could argue that this is still not a "comprehensive and precise spec". But what if the bp is happy with whatever Claude makes? Then their spec was sufficiently comprehensive and precise, since they got a program that solved their problem! Now the comic above makes the more specific claim that a spec "comprehensive and precise enough to generate a program" is code. That wasn't even true before LLMs. Program synthesis, the automatic generation of conformant programs from specifications, is an active field of research! Last I checked in 2019 they were only generating local functions from type specifications; I don't know how things have changed with LLMs. But still, it shows that code and compre ## LLMs are bad at vibing specifications DevFeed: [LLMs are bad at vibing specifications]() Original publisher: [Read original article]() Author: Hillel Wayne Published: 2026-03-10T17:12:30Z Content type: article Language: en Sources: [Newsletter feed for Hillel Wayne's Newsletter]() Topics: [Formal methods](), [Large Language Model](), [Specifications](), [Artificial Intelligence]() Tags: [ai](), [formal-methods](), [llms](), [nondeterminism](), [specifications](), [verification]() ### AI overview The article examines AI-generated TLA+ and Alloy specifications through a case study. It argues that these specifications may fail to compile or model-check and often contain tautological or obvious properties rather than subtle properties involving concurrency, nondeterminism, or multi-step bad behavior. ### Source excerpt No newsletter next week I'll be speaking at InfoQ London. But see below for a book giveaway! LLMs are bad at vibing specifications About a year ago I wrote AI is a gamechanger for TLA+ users, which argued that AI are a "specification force multiplier". That was written from the perspective an TLA+ expert using these tools. A full 4% of Github TLA+ specs now have the word "Claude" somewhere in them. This is interesting to me, because it suggests there was always an interest in formal methods, people just lacked the skills to do it. It's also interesting because it gives me a sense of what happens when beginners use AI to write formal specs. It's not good. As a case study, we'll use this project, which is kind of enough to have vibed out TLA+ and Alloy specs. Looking at a project Starting with the Alloy spec. Here it is in its entirety: module ThreatIntelMesh sig Node {} one sig LocalNode extends Node {} sig Snapshot { owner: one Node, signed: one Bool, signatures: set Signature } sig Signature {} sig Policy { allowUnsignedImport: one Bool } pred canImport[p: Policy, s: Snapshot] { (p.allowUnsignedImport = True) or (s.signed = True) } assert UnsignedImportMustBeDenied { all p: Policy, s: Snapshot | p.allowUnsignedImport = False and s.signed = False implies not canImport[p, s] } assert SignedImportMayBeAccepted { all p: Policy, s: Snapshot | s.signed = True implies canImport[p, s] } check UnsignedImportMustBeDenied for 5 check SignedImportMayBeAccepted for 5 Couple of things to note here: first of all, this doesn't actually compile. It's using the Boolean standard module so needs open util/boolean to function. Second, Boolean is the wrong approach here; you're supposed to use subtyping. sig Snapshot { owner: one Node, - signed: one Bool, signatures: set Signature } + sig SignedSnapshot in Snapshot {} pred canImport[p: Policy, s: Snapshot] { - s.signed = True + s in SignedSnapshot } So we know the person did not actually run these specs. This is somewhat less of a probl ## Stream of Consciousness Driven Development DevFeed: [Stream of Consciousness Driven Development]() Original publisher: [Read original article]() Author: Hillel Wayne Published: 2026-02-18T16:33:08Z Content type: opinion Language: en Sources: [Newsletter feed for Hillel Wayne's Newsletter]() Topics: [Development](), [Specifications](), [Markdown]() Tags: [concepts](), [development](), [experience](), [markdown](), [pairing](), [specifications]() ### AI overview The author describes a pairing technique for conceptually complex specification work: write the problem, discussion, rejected approaches, proposed solution, and rationale in a Markdown file before changing the specification. This helps partners understand the reasoning and agree on an approach, though the author reports having tried it only once. ### Source excerpt This is something I just tried out last week but it seems to have enough potential to be worth showing unpolished. I was pairing with a client on writing a spec. I saw a problem with the spec, a convoluted way of fixing the spec. Instead of trying to verbally explain it, I started by creating a new markdown file: NameOfProblem.md Then I started typing. First the problem summary, then a detailed description, then the solution and why it worked. When my partner asked questions, I incorporated his question and our discussion of it into the flow. If we hit a dead end with the solution, we marked it out as a dead end. Eventually the file looked something like this: Current state of spec Problems caused by this Elaboration of problems What we tried that didn't work Proposed Solution Theory behind proposed solution How the solution works Expected changes Other problems this helps solve Problems this does *not* help with Only once this was done, my partner fully understood the chain of thought, and we agreed it represented the right approach, did we start making changes to the spec. How is this better than just making the change? The change was conceptually complex. A rough analogy: imagine pairing with a beginner who wrote an insertion sort, and you want to replace it with quicksort. You need to explain why the insertion sort is too slow, why the quicksort isn't slow, and how quicksort actually correctly sorts a list. This could involve tangents into computational complexity, big-o notation, recursion, etc. These are all concepts you have internalized, so the change is simple to you, but the solution uses concepts the beginner does not know. So it's conceptually complex to them. I wasn't pairing with a beginning programmer or even a beginning specifier. This was a client who could confidently write complex specs on their own. But they don't work on specifications full time like I do. Any time there's a relative gap in experience in a pair, there's solutions that are concep ## Proving What's Possible DevFeed: [Proving What's Possible]() Original publisher: [Read original article]() Author: Hillel Wayne Published: 2026-02-11T18:36:53Z Content type: opinion Language: en Sources: [Newsletter feed for Hillel Wayne's Newsletter]() Topics: [Formal methods](), [Specifications](), [Math and Logic](), [systems]() Tags: [flow](), [formal-methods](), [specifications](), [state](), [statement]() ### AI overview A formal methods consultant introduces possibility properties for reasoning about what can happen in a system, distinguishing them from safety and liveness properties. Using temporal-logic notation and examples involving databases and state machines, the article describes possibility and reachability properties and combinations such as always possible and eventually possible. ### Source excerpt As a formal methods consultant I have to mathematically express properties of systems. I generally do this with two "temporal operators": A(x) means that x is always true. For example, a database table always satisfies all record-level constraints, and a state machine always makes valid transitions between states. If x is a statement about an individual state (as in the database but not state machine example), we further call it an invariant. E(x) means that x is "eventually" true, conventionally meaning "guaranteed true at some point in the future". A database transaction eventually completes or rolls back, a state machine eventually reaches the "done" state, etc. These come from linear temporal logic, which is the mainstream notation for expressing system properties. 1 We like these operators because they elegantly cover safety and liveness properties, and because we can combine them. A(E(x)) means x is true an infinite number of times, while A(x => E(y) means that x being true guarantees y true in the future. There's a third class of properties, that I will call possibility properties: P(x) is "can x happen in this model"? Is it possible for a table to have more than ten records? Can a state machine transition from "Done" to "Retry", even if it doesn't? Importantly, P(x) does not need to be possible immediately, just at some point in the future. It's possible to lose 100 dollars betting on slot machines, even if you only bet one dollar at a time. If x is a statement about an individual state, we can further call it a reachability property. I'm going to use the two interchangeably for flow. A(P(x)) says that x is always possible. No matter what we've done in our system, we can make x happen again. There's no way to do this with just A and E. Other meaningful combinations include: P(A(x)): there is a reachable state from which x is always true. A(x => P(y)): y is possible from any state where x is true. E(x && P(y)): There is always a future state where x is true a ## Review of the Self-Defining Systems proposal for AI-driven system development DevFeed: [Review of the Self-Defining Systems proposal for AI-driven system development]() Original publisher: [Read original article]() Author: Aleksey Charapko Published: 2026-01-30T01:24:00Z Content type: opinion Language: en Sources: [Aleksey Charapko]() Topics: [systems](), [Artificial Intelligence](), [Specifications](), [Processes]() Tags: [agentic](), [agents](), [ai](), [changes](), [improvements](), [llm](), [one-page-summary](), [papers](), [performance](), [research](), [specifications](), [systems]() ### AI overview The article reviews Self-Defining Systems, a proposal in which agentic engineers design and build systems from system and operating-environment specifications. It argues that the proposal extends the familiar try, evaluate, and repeat loop by allowing agents to change the specification as well as implement it, while noting that the paper lacks a precise definition of the process. ### Source excerpt Self-Defining Systems (SDS) by Thomas Anderson, Ratul Mahajan, Simon Peter, and Luke Zettlemoyer is a bold proposal for AI-driven systems research. In SDS, agentic "engineers" get the system specification and operating environment specification, then design and build the systems to spec. Crucially, as the specification or environment changes, an army of agents should notice and [...] ## Keycloak 26.4.0 released DevFeed: [Keycloak 26.4.0 released]() Original publisher: [Read original article]() Author: Keycloak Team Published: 2025-09-30T00:00:00Z Content type: release Language: en Sources: [Keycloak Blog]() Topics: [Keycloak](), [Passkeys](), [Security](), [OAuth 2.0](), [Specifications](), [SPIFFE](), [Kubernetes](), [OpenID connect (OIDC)](), [REST API](), [Availability]() Tags: [authentication](), [idm](), [kerberos](), [keycloak](), [keycloak-release](), [kubernetes](), [ldap](), [oauth](), [oauth-2-0](), [oidc](), [openid-connect](), [release](), [rest-api](), [saml](), [security](), [specifications](), [spiffe](), [sso](), [version]() ### AI overview Keycloak 26.4.0 introduces passkeys, federated client authentication using SPIFFE or Kubernetes service account tokens, support for final FAPI 2.0 specifications, and full DPoP support. The release also includes availability and administration improvements. ### Source excerpt To download the release go to Keycloak downloads. Highlights This release features new capabilities focused on security enhancements, deeper integration, and improved server administration. The highlights of this release are: Passkeys for seamless, passwordless authentication of users. Federated Client Authentication to use SPIFFE or Kubernetes service account tokens for client authentication. Simplified deployments across multiple availability zones to boost availability. FAPI 2 Final: Keycloak now supports the final specifications of FAPI 2.0 Security Profile and FAPI 2.0 Message Signing. DPoP: The OAuth 2.0 Demonstrating Proof-of-Possession at the Application Layer (DPoP) is now fully supported. Improvements include the ability to bind only refresh tokens for public clients, and securing all Keycloak endpoints with DPoP tokens. Read on to learn more about each new feature. If you are upgrading from a previous release, review also the changes listed in the upgrading guide. Security and Standards Passkeys integration (supported) Passkeys are now seamlessly integrated in the Keycloak login forms using both conditional and modal UIs. To activate the integration in the realm, go to Authentication, Policies, Webauthn Passwordless Policy and switch Enable Passkeys to enabled. For more information, see Passkeys. FAPI 2 Final (supported) Keycloak has support for the latest versions of FAPI 2 specifications. Specifications FAPI 2.0 Security Profile and FAPI 2.0 Message Signing are already promoted to Final and Keycloak supports them. Keycloak client policies support the final versions and corresponding client profiles for FAPI 2 are passing the FAPI conformance test suite. Apart from some very minor polishing of existing policies, Keycloak has new client profiles (fapi-2-dpop-security-profile and fapi-2-dpop-message-signing) for the clients that use DPoP and are intended to be FAPI 2 compliant. Thank you to Takashi Norimatsu for contributing this. For more details, see the ## RED DA Compliance (Part 2): Espressif's Platform Support, Templates, and Pathways for Conformity DevFeed: [RED DA Compliance (Part 2): Espressif's Platform Support, Templates, and Pathways for Conformity]() Original publisher: [Read original article]() Author: John Lee Published: 2025-07-09T00:00:00Z Content type: article Language: en Sources: [Blog on Developer Portal]() Topics: [EN 18031](), [Espressif](), [Documentation](), [ESP32](), [Security](), [Embedded Software Dev]() Tags: [blog](), [compliance](), [developers](), [documentation](), [en-18031](), [esp-idf](), [esp32](), [espressif](), [eu](), [firmware](), [iot](), [partner](), [platforms](), [requirements](), [security](), [specifications](), [standard](), [technical](), [third-party]() ### AI overview Espressif's Part 2 guide describes documentation templates and support pathways for helping manufacturers prepare RED Delegated Act compliance documentation for ESP32-based products under the EN 18031 standard. The article covers self-assessment, third-party assessment, product risk documentation, applicable standards, declarations of conformity, and technical specifications. ### Source excerpt Espressif is streamlining RED Delegated Act (RED-DA) compliance by providing pre-certified firmware platforms, documentation templates, and partner support to help developers meet the upcoming EN 18031 standard. With flexible pathways including self-declaration and third-party assessments, developers can accelerate EU market readiness for Aug 2025 and beyond. [Next page]()