# Terracotta

Published articles for Terracotta.

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## Programmable Memory Controller Eases Adoption of New DRAM Techniques (ETH Zürich, CISPA, NYU)

DevFeed: [Programmable Memory Controller Eases Adoption of New DRAM Techniques (ETH Zürich, CISPA, NYU)](<https://devfeed.tech/articles/programmable-memory-controller-eases-adoption-of-new-dram-techniques-eth-zurich-cispa-nyu-66450.md>)

Original publisher: [Read original article](<https://semiengineering.com/programmable-memory-controller-eases-adoption-of-new-dram-techniques-eth-zurich-cispa-nyu/>)

Author: Technical Paper Link

Published: 2026-10-06T20:58:05Z

Content type: news

Language: en

Sources: [Semiconductor Engineering](<https://devfeed.tech/sources/semiconductor-engineering.md>)

Topics: [performance-engineering](<https://devfeed.tech/topics/performance-engineering.md>), [CPU Cache](<https://devfeed.tech/topics/cpu-cache.md>)

Tags: [architectures](<https://devfeed.tech/tags/architectures.md>), [cispa](<https://devfeed.tech/tags/cispa.md>), [ddr5](<https://devfeed.tech/tags/ddr5.md>), [dram](<https://devfeed.tech/tags/dram.md>), [dram-reliability](<https://devfeed.tech/tags/dram-reliability.md>), [eth-zurich](<https://devfeed.tech/tags/eth-zurich.md>), [memory](<https://devfeed.tech/tags/memory.md>), [memory-architecture](<https://devfeed.tech/tags/memory-architecture.md>), [memory-controllers](<https://devfeed.tech/tags/memory-controllers.md>), [memory-interface](<https://devfeed.tech/tags/memory-interface.md>), [memory-latency](<https://devfeed.tech/tags/memory-latency.md>), [memory-maintenance](<https://devfeed.tech/tags/memory-maintenance.md>), [new-york-university](<https://devfeed.tech/tags/new-york-university.md>), [performance](<https://devfeed.tech/tags/performance.md>), [power-and-performance](<https://devfeed.tech/tags/power-and-performance.md>), [power-performance](<https://devfeed.tech/tags/power-performance.md>), [processing-in-memory](<https://devfeed.tech/tags/processing-in-memory.md>), [processing-using-dram](<https://devfeed.tech/tags/processing-using-dram.md>), [programmable-memory-controller](<https://devfeed.tech/tags/programmable-memory-controller.md>), [semiconductor](<https://devfeed.tech/tags/semiconductor.md>), [subarray-parallelism](<https://devfeed.tech/tags/subarray-parallelism.md>), [systems](<https://devfeed.tech/tags/systems.md>), [terracotta](<https://devfeed.tech/tags/terracotta.md>), [volatile-memory](<https://devfeed.tech/tags/volatile-memory.md>)

### AI overview

Researchers at ETH Zürich, CISPA, and New York University present Terracotta, a flexible DRAM interface and programmable memory controller designed to make new DRAM techniques easier to deploy. The framework uses configurable command extensions and post-silicon controller programming to reduce repeated hardware modifications.

### Source excerpt

Researchers at ETH Zürich, CISPA, and New York University published a technical paper titled "Terracotta: Enabling the Adoption of New DRAM Techniques via a Flexible DRAM Interface and Memory Controller." Abstract Excerpt: "DRAM continues to limit the performance, energy efficiency, and robustness of modern systems. Many prior works propose DRAM techniques that support in-DRAM computation,... " read more The post Programmable Memory Controller Eases Adoption of New DRAM Techniques (ETH Zürich, CISPA, NYU) appeared first on Semiconductor Engineering.