# TPU Optimization

Published articles for TPU Optimization.

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## Unlocking TPU performance: Deep kernel profiling with XProf

DevFeed: [Unlocking TPU performance: Deep kernel profiling with XProf](<https://devfeed.tech/articles/unlocking-tpu-performance-deep-kernel-profiling-with-xprof-34314.md>)

Original publisher: [Read original article](<http://opensource.googleblog.com/2026/06/unlocking-tpu-performance-deep-kernel-profiling-with-xprof.html>)

Author: Google Open Source (noreply@blogger.com)

Published: 2026-06-08T18:30:00Z

Content type: release

Language: en

Sources: [Google Open Source Blog](<https://devfeed.tech/sources/google-open-source-blog.md>)

Topics: [AI Development](<https://devfeed.tech/topics/ai-development.md>), [telemetry](<https://devfeed.tech/topics/telemetry.md>), [debugging](<https://devfeed.tech/topics/debugging.md>), [Compiler](<https://devfeed.tech/topics/compiler.md>), [Google](<https://devfeed.tech/topics/google.md>)

Tags: [compiler](<https://devfeed.tech/tags/compiler.md>), [debugging](<https://devfeed.tech/tags/debugging.md>), [google](<https://devfeed.tech/tags/google.md>), [ml-dev-tools](<https://devfeed.tech/tags/ml-dev-tools.md>), [performance](<https://devfeed.tech/tags/performance.md>), [profiling](<https://devfeed.tech/tags/profiling.md>), [telemetry](<https://devfeed.tech/tags/telemetry.md>), [tpu](<https://devfeed.tech/tags/tpu.md>), [tpu-optimization](<https://devfeed.tech/tags/tpu-optimization.md>), [tpu-performance](<https://devfeed.tech/tags/tpu-performance.md>)

### AI overview

Google introduces the Kernel Profiling suite in XProf for debugging and optimizing custom Pallas kernels on Google TPUs. It combines static compilation tracking with dynamic, sub-microsecond hardware telemetry and exposes compilation details through HLO graphs and lowered MLIR text.

### Source excerpt

by Yogesh SY, AI Infra Google Unlocking TPU performance: Deep kernel profiling with XProf As machine learning workloads scale to unprecedented heights, developers are increasingly writing highly specialized Tensor Processing Unit (TPU) kernels using frameworks like Pallas, Mosaic, and Triton to maximize hardware performance. However, customizing high-performance kernels has historically introduced a major engineering challenge: optimization blind spots. To legacy performance profilers, custom compilation paths appear as opaque execution paths. Developers are left with single, massive execution blocks in their trace captures, lacking granular visibility into what is actually occurring inside the chip's internal components. Did a vector processing instruction stall? Was matrix math idle due to data loading bottlenecks? Traditional profiling relies heavily on compile-time static cost models to estimate kernel efficiency. While helpful for standard operations, these models cannot capture dynamic runtime realities like instruction execution stalls, memory subsystem congestion, or hardware scheduling conflicts. To open this opaque execution path, we are excited to introduce the Kernel Profiling suite in XProf--a low-level hardware debugging suite engineered specifically for Pallas kernel authoring and optimization on Google TPUs. By combining static compilation tracking with dynamic, sub-microsecond hardware telemetry, XProf Kernel provides the deep transparency required to optimize high-scale ML workloads. Deep visibility: HLO Graphs & MLIR Inspection The first step in debugging any custom kernel is understanding how your high-level code is translated by the compiler. When compiling a JAX or PyTorch model, the compiler generates a High-Level Optimizer (HLO) graph. Previously, custom calls inside these graphs remained completely obscured. XProf's updated Graph Viewer resolves this by exposing the internal compilation logic of these custom regions directly. To unlock this d