# transistor models

Published articles for transistor models.

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## From Physical Devices to RTL Models: Abstraction and Validation in Hardware Engineering

DevFeed: [From Physical Devices to RTL Models: Abstraction and Validation in Hardware Engineering](<https://devfeed.tech/articles/tracing-hardware-design-from-physical-devices-to-rtl-infineon-tu-munich-64275.md>)

Original publisher: [Read original article](<https://semiengineering.com/tracing-hardware-design-from-physical-devices-to-rtl-infineon-tu-munich/>)

Author: Technical Paper Link

Published: 2026-10-02T22:46:46Z

Content type: article

Language: en

Sources: [Semiconductor Engineering](<https://devfeed.tech/sources/semiconductor-engineering.md>)

Topics: [Chip design](<https://devfeed.tech/topics/chip-design.md>), [Hardware](<https://devfeed.tech/topics/hardware.md>), [Embedded Systems](<https://devfeed.tech/topics/embedded-systems.md>)

Tags: [abstraction](<https://devfeed.tech/tags/abstraction.md>), [design-validation](<https://devfeed.tech/tags/design-validation.md>), [design-verification](<https://devfeed.tech/tags/design-verification.md>), [digital-design](<https://devfeed.tech/tags/digital-design.md>), [equivalence-checking](<https://devfeed.tech/tags/equivalence-checking.md>), [gate-level-design](<https://devfeed.tech/tags/gate-level-design.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [hardware-description-languages](<https://devfeed.tech/tags/hardware-description-languages.md>), [hardware-design](<https://devfeed.tech/tags/hardware-design.md>), [hardware-engineering](<https://devfeed.tech/tags/hardware-engineering.md>), [hdl](<https://devfeed.tech/tags/hdl.md>), [infineon](<https://devfeed.tech/tags/infineon.md>), [infineon-technologies](<https://devfeed.tech/tags/infineon-technologies.md>), [modeling](<https://devfeed.tech/tags/modeling.md>), [paper](<https://devfeed.tech/tags/paper.md>), [register-transfer-level](<https://devfeed.tech/tags/register-transfer-level.md>), [rtl](<https://devfeed.tech/tags/rtl.md>), [semiconductor](<https://devfeed.tech/tags/semiconductor.md>), [simulation](<https://devfeed.tech/tags/simulation.md>), [synthesis](<https://devfeed.tech/tags/synthesis.md>), [technical-papers](<https://devfeed.tech/tags/technical-papers.md>), [technical-university-of-munich](<https://devfeed.tech/tags/technical-university-of-munich.md>), [transistor-models](<https://devfeed.tech/tags/transistor-models.md>), [tu-munich](<https://devfeed.tech/tags/tu-munich.md>)

### AI overview

A paper from researchers at Infineon Technologies and Technical University of Munich examines abstraction in hardware engineering models. It discusses how lumped, value-discrete, and time-discrete models simplify digital design, enable faster simulation, and define constraints for valid abstractions. The paper also relates these methods to elements such as transistors, gates, registers, and transfer functions across design abstraction levels.

### Source excerpt

Researchers at Infineon Technologies and Technical University of Munich published a technical paper titled "From Physical Devices to RTL Models: Abstraction and Validation in Hardware Engineering." Abstract: "This paper introduces the foundational principles underlying hardware engineering models and argues that abstraction is their defining characteristic. Because abstraction necessarily omits detail and constrains what engineers can... " read more The post Tracing Hardware Design From Physical Devices to RTL (Infineon, TU Munich) appeared first on Semiconductor Engineering.