# Vectorization Published articles for Vectorization. This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles. ## Map LLVM Values to corresponding source level expression, GSoC'23 Project DevFeed: [Map LLVM Values to corresponding source level expression, GSoC'23 Project]() Original publisher: [Read original article]() Author: Shivam Kunwar Published: 2023-09-19T00:00:00Z Content type: article Language: en Sources: [The LLVM Project Blog]() Topics: [LLVM](), [Compiler](), [Optimization](), [Development](), [interface](), [implementation]() Tags: [analysis](), [code](), [compiler](), [debug](), [gsoc](), [llvm](), [llvm-ir](), [loop-vectorizer](), [optimization](), [remarks](), [tests](), [vectorization]() ### AI overview A 2023 Google Summer of Code project with the LLVM Foundation developed an LLVM IR analysis pass that maps LLVM values, especially load and store addresses, to equivalent source-level expressions. The work uses debug metadata and intrinsics, integrates with the loop vectorizer, and includes tests. ### Source excerpt Hi, My name is Shivam, I involved with the LLVM Foundation in 2023 GSoC edition and worked on an interesting project Map LLVM Values to corresponding source level expression. Project Scope Programmers frequently rely on compiler-generated remarks and analysis reports to enhance the efficiency of their code. While compilers excel at including source code positions (such as line and column numbers) in these generated messages, it would be advantageous if these reports also contained the corresponding source-level expressions. The LLVM implementation presently employs a limited set of intrinsic functions to establish a connection between LLVM program elements and source-level expressions. This project's objective is to leverage the data embedded in these intrinsic functions to either generate source expressions that correspond to LLVM values. The optimization of memory accesses within a program is crucial for achieving optimal application performance. Specifically, our goal is to utilize compiler analysis messages that detail source-level memory accesses associated with LLVM load/store pointer values, which can impede compiler optimizations. As an illustration, this information can be used to identify memory access dependencies that hinder vectorization. Expected result was to provide an interface which takes an LLVM value at any point in the LLVM transformations pipeline and returns a string corresponding to the equivalent source-level expression. We are especially interested in using this interface to map addresses used in load/store instructions to equivalent source-level memory references. What we did The core achievement of the project is the development of an analysis pass that operates on LLVM intermediate representation (IR). This analysis pass identifies load and store instructions, and then conducts a recursive traversal to construct source expressions that represent equivalent source-level memory references. This is achieved by utilizing the metadata and deb ## Loop Vectorization: Diagnostics and Control DevFeed: [Loop Vectorization: Diagnostics and Control]() Original publisher: [Read original article]() Author: Tyler Nowicki Published: 2014-11-24T15:12:00Z Content type: article Language: en Sources: [The LLVM Project Blog]() Topics: [LLVM](), [Optimization](), [clang](), [C](), [Command-line interface](), [Hardware](), [Development]() Tags: [c](), [c-plus-plus](), [clang](), [command-line](), [diagnostics](), [llvm](), [loop-vectorizer](), [loops](), [optimization](), [performance](), [vectorization]() ### AI overview This article explains LLVM loop-vectorization diagnostics and controls. It covers diagnostic remarks, command-line options, and pragma syntax for tuning vectorization, interleaving, and unrolling, including examples of vectorized and non-vectorized C loops. ### Source excerpt Loop vectorization was first introduced in LLVM 3.2 and turned on by default in LLVM 3.3. It has been discussed previously on this blog in 2012 and 2013, as well as at FOSDEM 2014, and at Apple's WWDC 2013. The LLVM loop vectorizer combines multiple iterations of a loop to improve performance. Modern processors can exploit the independence of the interleaved instructions using advanced hardware features, such as multiple execution units and out-of-order execution, to improve performance. Unfortunately, when loop vectorization is not possible or profitable the loop is silently skipped. This is a problem for many applications that rely on the performance vectorization provides. Recent updates to LLVM provide command line arguments to help diagnose vectorization issues and new a pragma syntax for tuning loop vectorization, interleaving, and unrolling. New Feature: Diagnostics Remarks Diagnostic remarks provide the user with an insight into the behavior of the behavior of LLVM's optimization passes including unrolling, interleaving, and vectorization. They are enabled using the Rpass command line arguments. Interleaving and vectorization diagnostic remarks are produced by specifying the 'loop-vectorize' pass. For example, specifying '-Rpass=loop-vectorize' tells us the following loop was vectorized by 4 and interleaved by 2. void test1(int *List, int Length) { int i = 0; while(i < Length) { List[i] = i*2; i++; } } clang -O3 -Rpass=loop-vectorize -S test1.c -o /dev/null test1.c:4:5: remark: vectorized loop (vectorization factor: 4, unrolling interleave factor: 2) while(i < Length) { ^ Many loops cannot be vectorized including loops with complicated control flow, unvectorizable types, and unvectorizable calls. For example, to prove it is safe to vectorize the following loop we must prove that array 'A' is not an alias of array 'B'. However, the bounds of array 'A' cannot be identified. void test2(int *A, int *B, int Length) { for (int i = 0; i < Length; i++) A[B[i]]++; } ## LLVM 3.3 Vectorization Improvements DevFeed: [LLVM 3.3 Vectorization Improvements]() Original publisher: [Read original article]() Author: Nadav Rotem Published: 2013-05-28T07:05:00Z Content type: release Language: en Sources: [The LLVM Project Blog]() Topics: [LLVM](), [Compiler](), [clang](), [x86](), [Arm](), [Code](), [optimize](), [parallel]() Tags: [arm](), [clang](), [compiler](), [llvm](), [new-in-llvm-3-3](), [optimization](), [parallel](), [performance](), [release](), [vectorization](), [x86]() ### AI overview An update on LLVM 3.3's vectorization improvements, including a loop vectorizer enabled by default at -O3, a new SLP vectorizer, new Clang command-line flags, improved x86 and Arm cost models, loop unrolling, and support for additional loop patterns. ### Source excerpt I would like to give a brief update regarding vectorization in LLVM. When LLVM 3.2 was released, it featured a new experimental loop vectorizer that was disabled by default. Since LLVM 3.2 was released, we have continued to work hard on improving vectorization, and we have some news to share. First, the loop vectorizer has new features and is now enabled by default on -O3. Second, we have a new SLP vectorizer. And finally, we have new clang command line flags to control the vectorizers. Loop Vectorizer The LLVM Loop Vectorizer has a number of new features that allow it to vectorize even more complex loops with better performance. One area that we focused on is the vectorization "cost model". When LLVM estimates if a loop may benefit from vectorization it uses a detailed description of the processor that can estimate the cost of various instructions. We improved both the X86 and ARM cost models. Improving the cost models helped the compiler to detect benefitting loops and improve the performance of many programs. During the analysis of vectorized programs, we also found and optimized many vector code sequences. Another important improvement to the loop vectorizer is the ability to unroll during vectorization. When the compiler unrolls loops it generates more independent instructions that modern out-of-order processors can execute in parallel. The loop below adds all of the numbers in the array. When compiling this loop, LLVM creates two independent chains of calculations that can be executed in parallel. int sum_elements(int *A, int n) { int sum = 0; for (int i = 0; i < n; ++i) sum += A[i]; return sum; } The innermost loop of the program above is compiled into the X86 assembly sequence below, which processes 8 elements at once, in two parallel chains of computations. The vector registers XMM0 and XMM1 are used to store the partial sum of different parts of the array. This allows the processor to load two values and add two values simultaneously. LBB0_4: movdqu 16(%rd ## New Loop Vectorizer DevFeed: [New Loop Vectorizer]() Original publisher: [Read original article]() Author: Nadav Rotem Published: 2012-12-07T10:12:00Z Content type: article Language: en Sources: [The LLVM Project Blog]() Topics: [LLVM](), [Optimization](), [Benchmark](), [clang](), [Code](), [C]() Tags: [benchmark](), [c](), [clang](), [code](), [codegen](), [gcc](), [if-statement](), [llvm](), [loops](), [new-in-llvm-3-3](), [optimization](), [performance](), [reduction](), [vectorization]() ### AI overview An update on LLVM's Loop Vectorizer, which complements the Basic Block Vectorizer by widening loop instructions across consecutive iterations. The article describes support for reductions, control-flow flattening, and loops with unknown trip counts, along with benchmarked performance improvements. ### Source excerpt I would like to give a brief update regarding the development of the Loop Vectorizer. LLVM now has two vectorizers: The Loop Vectorizer, which operates on Loops, and the Basic Block Vectorizer, which optimizes straight-line code. These vectorizers focus on different optimization opportunities and use different techniques. The BB vectorizer merges multiple scalars that are found in the code into vectors while the Loop Vectorizer widens instructions in the original loop to operate on multiple consecutive loop iterations. LLVM's Loop Vectorizer is now available and will be useful for many people. It is not enabled by default, but can be enabled through clang using the command line flag "-mllvm -vectorize-loops". We plan to enable the Loop Vectorizer by default as part of the LLVM 3.3 release. The Loop Vectorizer can boost the performance of many loops, including some loops that are not vectorizable by GCC. In one benchmark, Linpack-pc, the Loop Vectorizer boosts the performance of gaussian elimination of single precision matrices from 984 MFlops to 2539 MFlops - a 2.6X boost in performance. The vectorizer also boosts the "GCC vectorization examples" benchmark by a geomean of 2.15X. The LLVM Loop Vectorizer has a number of features that allow it to vectorize complex loops. Most of the features described in this post are available as part of the LLVM 3.2 release, but some features were added after the cutoff date. Here is one small example of a loop that the LLVM Loop Vectorizer can vectorize. int foo(int *A, int *B, int n) { unsigned sum = 0; for (int i = 0; i < n; ++i) if (A[i] > B[i]) sum += A[i] + 5; return sum; } In this example, the Loop Vectorizer uses a number of non-trivial features to vectorize the loop. The 'sum' variable is used by consecutive iterations of the loop. Normally, this would prevent vectorization, but the vectorizer can detect that 'sum' is a reduction variable. The variable 'sum' becomes a vector of integers, and at the end of the loop the eleme ## LLVM 3.1 vector changes DevFeed: [LLVM 3.1 vector changes]() Original publisher: [Read original article]() Author: Nadav Rotem Published: 2011-12-19T04:10:00Z Content type: article Language: en Sources: [The LLVM Project Blog]() Topics: [LLVM](), [Compiler](), [compilers](), [OpenCL](), [implementation](), [data type]() Tags: [code-generation](), [compilers](), [data-type](), [implementation](), [intel](), [llvm](), [llvm-ir](), [new-in-llvm-3-1](), [opencl](), [optimization](), [vectorization]() ### AI overview This post explains LLVM 3.1 changes for compiling vector operations, focusing on vector-select and vectors-of-pointers. It describes how LLVM-IR vector types are translated into SIMD instructions, including SSE blends, through code-generation and type-legalization work. ### Source excerpt Intel uses the Low-Level Virtual Machine (LLVM) in a number of products, including the Intel® OpenCL SDK. The SDK's implicit vectorization module generates LLVM-IR (intermediate representation) which uses vector types. LLVM-IR supports operations that use vector data types, and the LLVM code generator needs to do non-trivial work in order to efficiently compile vector operations into SIMD instructions. Recently, there were changes to the LLVM code generation that enabled better code generation for vector operations. In addition to many low level optimizations, this post talks about two major changes: the implementation of vector-select, and the support for vectors-of-pointers.The LLVM-IR select instructionThe LLVM IR 'select' instruction is used to choose one value based on a condition. If the condition evaluates to 'True', the instruction returns the first value argument; otherwise, it returns the second value argument. For example: %X = select i1 true, i8 17, i8 42 ; yields i8:17The 'select' instruction also supports vector data types, where the condition is a vector of boolean data type. If the condition is a vector of booleans (see above), then the selection is done per element. Vector-select instructions are very useful for vectorizing compilers, which use them to 'mask-out' inactive SIMD lanes. Until recently, the LLVM code generator did not support conditions with vector data types. Enabling them required enhancing several other areas of the code generator.SSE blendsIntel's SSE4.1 instruction set features the PBLENDVB instruction. This instruction selects byte values from registers XMM1 and XMM2, using a mask specified in the high bit of each byte in XMM0, and stores the values into XMM1. There are also other instructions for handling larger data types, such as 32-bit integers, etc. It may seem odd for the selector bits to be the high bit, but the vector-compare machine instructions also set the high bits, so that the compare and blend instructions can work t