# xpu Published articles for xpu. This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles. ## d-Matrix Joins the NVIDIA NVLink Fusion Platform DevFeed: [d-Matrix Joins the NVIDIA NVLink Fusion Platform]() Original publisher: [Read original article]() Author: Cliff Robinson Published: 2026-09-12T21:42:59Z Content type: news Language: en Sources: [ServeTheHome]() Topics: [d-matrix](), [NVLink](), [Nvidia](), [xpu](), [AI Inference](), [datacenter](), [networking](), [cpu](), [Spectrum-X]() Tags: [accelerators](), [ai](), [ai-accelerator](), [ai-inference](), [d-matrix](), [data-center](), [ethernet](), [networking](), [nvidia](), [nvidia-vera](), [nvlink](), [server](), [xpu]() ### AI overview d-Matrix and NVIDIA announced that d-Matrix will bring its next-generation XPUs to the NVLink Fusion platform. The integration is intended to support scaling from individual Raptor XPUs to larger rack-scale and clustered deployments for AI inference, alongside NVIDIA networking and CPU technologies. ### Source excerpt d-Matrix and NVIDIA announced that d-Matrix will use NVLink Fusion to scale up and out with its next-gen Raptor AI accelerators The post d-Matrix Joins the NVIDIA NVLink Fusion Platform appeared first on ServeTheHome. ## d-Matrix Adopts NVIDIA NVLink Fusion for Rack-Scale XPU Deployment DevFeed: [d-Matrix Adopts NVIDIA NVLink Fusion for Rack-Scale XPU Deployment]() Original publisher: [Read original article]() Author: Jesse Clayton Published: 2026-09-10T13:00:21Z Content type: news Language: en Sources: [NVIDIA Blog]() Topics: [NVLink](), [AI Platform](), [AI Inference](), [Deployment](), [networking](), [Latency](), [cpu](), [GPU]() Tags: [ai-inference](), [ai-infrastructure](), [ai-platform](), [corporate](), [d-matrix](), [deployment](), [gpu](), [latency](), [networking](), [nvidia](), [nvidia-vera](), [nvidia-vera-rubin](), [nvlink](), [spectrum-x](), [xpu]() ### AI overview d-Matrix announced plans to use NVIDIA NVLink Fusion to connect its next-generation Raptor XPUs with NVIDIA AI infrastructure. The article describes using NVLink, Spectrum-X networking and MGX rack designs to support rack-scale, low-latency inference deployments. ### Source excerpt AI inference chipmaker d-Matrix today announced it will use NVLink Fusion to connect its next-generation Raptor XPUs to NVIDIA's AI infrastructure platform -- joining a growing roster of ecosystem partners. By connecting Raptor to NVIDIA NVLink scale-up and Spectrum-X scale-out networking, the NVIDIA MGX rack architecture and the broader NVIDIA AI platform, NVLink Fusion gives [...] ## d-Matrix drinks the Nvidia Kool-Aid with NVLink Fusion and MGX rack designs DevFeed: [d-Matrix drinks the Nvidia Kool-Aid with NVLink Fusion and MGX rack designs]() Original publisher: [Read original article]() Author: Tobias Mann Published: 2026-09-10T13:00:00Z Content type: news Language: en Sources: [www.theregister.com - Articles]() Topics: [NVLink](), [d-matrix](), [AI Platform]() Tags: [ai](), [ai-infrastructure](), [amazon](), [d-matrix](), [datacenter](), [fujitsu](), [gpu](), [nvidia](), [nvlink](), [startup](), [systems](), [xpu]() ### AI overview d-Matrix, an AI infrastructure startup, is described as joining other companies as an NVLink supporter. The headline also references NVLink Fusion and MGX rack designs. ### Source excerpt AI infrastructure startup joins Qualcomm, Arm, Marvell, Amazon, Fujitsu, and MediaTek as NVLink true believers ## NVIDIA NVLink Fusion Expands With NVHBM Custom High-Bandwidth Memory DevFeed: [NVIDIA NVLink Fusion Expands With NVHBM Custom High-Bandwidth Memory]() Original publisher: [Read original article]() Author: Jesse Clayton Published: 2026-08-26T21:05:30Z Content type: news Language: en Sources: [NVIDIA Blog]() Topics: [NVLink](), [AI Infrastructure](), [Nvidia](), [networking](), [Amazon Web Services](), [amazon]() Tags: [ai-infrastructure](), [amazon](), [aws](), [hardware](), [infrastructure](), [networking](), [nvidia](), [nvlink](), [performance](), [xpu]() ### AI overview NVIDIA expands NVLink Fusion with NVHBM, a high-bandwidth memory technology for custom AI infrastructure. By moving the memory controller into the HBM base die, NVHBM is designed to provide up to 30% greater memory bandwidth, 15% lower HBM power consumption, and up to 25% more XPU compute-die area than standard HBM4E. Amazon's Annapurna Labs will be the first memory partner to work with NVIDIA on the technology, alongside collaboration on NVLink scale-up architecture for future AWS Trainium systems. ### Source excerpt The next wave of AI is placing new demands on infrastructure. As AI agents and trillion-parameter workloads become mainstream, the performance of AI infrastructure depends not only on compute, but on how compute, memory, storage, networking and software are designed together as a unified system. To help hyperscalers and AI innovators build the next generation [...] ## How XPUs Meet a World-Class AI Factory DevFeed: [How XPUs Meet a World-Class AI Factory]() Original publisher: [Read original article]() Author: Jesse Clayton Published: 2026-08-24T15:00:54Z Content type: article Language: en Sources: [NVIDIA Blog]() Topics: [AI Factory](), [NVLink](), [AI Infrastructure](), [Network](), [networking](), [Low Latency](), [moe](), [Artificial Intelligence](), [Nvidia](), [AI Platform](), [Latency]() Tags: [agentic-ai](), [ai-factory](), [ai-infrastructure](), [ecosystem](), [ethernet](), [gb300-nvl72](), [hardware](), [mixture-of-experts](), [networking](), [nvidia-dsx](), [nvl72](), [nvlink](), [software](), [time](), [xpu]() ### AI overview The article explains how NVLink Fusion combines custom XPUs with NVIDIA's established AI infrastructure to help build semi-custom AI factories. It focuses on scale-up networking, performance, resiliency, telemetry, platform maturity, and the economics of large-scale AI workloads. ### Source excerpt To generate intelligence at scale, AI factories run continuously, and their economics are defined by delivered output: tokens per second, tokens per watt, cost per token, utilization and uptime. That requires AI infrastructure designed and built as a full factory, not a collection of individual accelerators. Hyperscalers and AI-native companies building custom XPUs must consider [...]