# pcie

PCIe is a standards-based, point-to-point serial interconnect used throughout computing and embedded devices.

This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles.

## AMD Sends Out Linux Patches For Enabling SEV-TIO TDISP With PCIe 6.0

DevFeed: [AMD Sends Out Linux Patches For Enabling SEV-TIO TDISP With PCIe 6.0](<https://devfeed.tech/articles/amd-sends-out-linux-patches-for-enabling-sev-tio-tdisp-with-pcie-6-0-31406.md>)

Original publisher: [Read original article](<https://www.phoronix.com/news/AMD-SEV-TIO-TDISP-Linux-Patches>)

Author: Michael Larabel

Published: 2026-09-16T13:02:52Z

Content type: news

Language: en

Sources: [Phoronix](<https://devfeed.tech/sources/phoronix.md>)

Topics: [Linux Kernel](<https://devfeed.tech/topics/linux-kernel.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [trusted-execution-environment](<https://devfeed.tech/topics/trusted-execution-environment.md>), [Confidential Computing](<https://devfeed.tech/topics/confidential-computing.md>), [virtualization](<https://devfeed.tech/topics/virtualization.md>), [Security](<https://devfeed.tech/topics/security.md>), [Encryption](<https://devfeed.tech/topics/encryption.md>), [MERN](<https://devfeed.tech/topics/mern.md>)

Tags: [amd](<https://devfeed.tech/tags/amd.md>), [arm](<https://devfeed.tech/tags/arm.md>), [attestation](<https://devfeed.tech/tags/attestation.md>), [confidential-computing](<https://devfeed.tech/tags/confidential-computing.md>), [cpu](<https://devfeed.tech/tags/cpu.md>), [desktop-linux](<https://devfeed.tech/tags/desktop-linux.md>), [encryption](<https://devfeed.tech/tags/encryption.md>), [intel](<https://devfeed.tech/tags/intel.md>), [kernel](<https://devfeed.tech/tags/kernel.md>), [linux](<https://devfeed.tech/tags/linux.md>), [linux-benchmarking](<https://devfeed.tech/tags/linux-benchmarking.md>), [linux-hardware-benchmarks](<https://devfeed.tech/tags/linux-hardware-benchmarks.md>), [linux-hardware-reviews](<https://devfeed.tech/tags/linux-hardware-reviews.md>), [linux-how-to](<https://devfeed.tech/tags/linux-how-to.md>), [linux-kernel](<https://devfeed.tech/tags/linux-kernel.md>), [linux-performance](<https://devfeed.tech/tags/linux-performance.md>), [linux-server-benchmarks](<https://devfeed.tech/tags/linux-server-benchmarks.md>), [open-source-graphics](<https://devfeed.tech/tags/open-source-graphics.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [phoronix](<https://devfeed.tech/tags/phoronix.md>), [phoronix-test-suite](<https://devfeed.tech/tags/phoronix-test-suite.md>), [processors](<https://devfeed.tech/tags/processors.md>), [risc-v](<https://devfeed.tech/tags/risc-v.md>), [security](<https://devfeed.tech/tags/security.md>), [ubuntu-benchmarks](<https://devfeed.tech/tags/ubuntu-benchmarks.md>), [ubuntu-hardware](<https://devfeed.tech/tags/ubuntu-hardware.md>)

### AI overview

AMD submitted 17 Linux kernel patches to enable SEV-TIO TDISP for PCIe 6.0 and newer. The work is intended to secure direct I/O device assignment for confidential-computing environments, including AMD Secure Encrypted Virtualization guest VMs, and includes a common TEE Security Manager developed with Intel, Arm, and RISC-V.

### Source excerpt

The newest Linux kernel patches out of AMD for enhancing the upstream support with the new AMD EPYC 9006 "Venice" processors is for enabling SEV-TIO TDISP that is supported with PCI Express 6.0 and beyond...

## AAEON MIX-PTLWV1 Panther Lake industrial mini-ITX motherboard offers quad DisplayPort, dual 10GbE, and more

DevFeed: [AAEON MIX-PTLWV1 Panther Lake industrial mini-ITX motherboard offers quad DisplayPort, dual 10GbE, and more](<https://devfeed.tech/articles/aaeon-mix-ptlwv1-panther-lake-industrial-mini-itx-motherboard-offers-quad-displayport-dual-10gbe-and-more-31426.md>)

Original publisher: [Read original article](<https://www.cnx-software.com/2026/09/16/aaeon-mix-ptlwv1-panther-lake-industrial-mini-itx-motherboard-offers-quad-displayport-dual-10gbe/>)

Author: Jean-Luc Aufranc (CNXSoft)

Published: 2026-09-16T12:00:59Z

Content type: news

Language: en

Sources: [CNX Software - Embedded Systems News](<https://devfeed.tech/sources/cnx-software-embedded-systems-news.md>)

Topics: [Embedded Systems](<https://devfeed.tech/topics/embedded-systems.md>), [intel](<https://devfeed.tech/topics/intel.md>), [Intel Core](<https://devfeed.tech/topics/intel-core.md>), [ddr5](<https://devfeed.tech/topics/ddr5.md>), [M.2 NVMe](<https://devfeed.tech/topics/m-2-nvme.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [Graphics](<https://devfeed.tech/topics/graphics.md>), [Specifications](<https://devfeed.tech/topics/specifications.md>)

Tags: [10gbe](<https://devfeed.tech/tags/10gbe.md>), [2-5gbe](<https://devfeed.tech/tags/2-5gbe.md>), [4g-lte](<https://devfeed.tech/tags/4g-lte.md>), [5g](<https://devfeed.tech/tags/5g.md>), [aaeon](<https://devfeed.tech/tags/aaeon.md>), [artificial-intelligence-ai](<https://devfeed.tech/tags/artificial-intelligence-ai.md>), [automotive](<https://devfeed.tech/tags/automotive.md>), [ddr5](<https://devfeed.tech/tags/ddr5.md>), [graphics](<https://devfeed.tech/tags/graphics.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [industrial](<https://devfeed.tech/tags/industrial.md>), [intel-core](<https://devfeed.tech/tags/intel-core.md>), [linux](<https://devfeed.tech/tags/linux.md>), [m-2-nvme](<https://devfeed.tech/tags/m-2-nvme.md>), [mini-itx](<https://devfeed.tech/tags/mini-itx.md>), [motherboard](<https://devfeed.tech/tags/motherboard.md>), [nvme](<https://devfeed.tech/tags/nvme.md>), [panther-lake](<https://devfeed.tech/tags/panther-lake.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [single-board-computer](<https://devfeed.tech/tags/single-board-computer.md>), [smart-city](<https://devfeed.tech/tags/smart-city.md>), [specifications](<https://devfeed.tech/tags/specifications.md>), [ubuntu](<https://devfeed.tech/tags/ubuntu.md>), [windows-11](<https://devfeed.tech/tags/windows-11.md>)

### AI overview

CNX Software reports on the AAEON MIX-PTLWV1, an industrial mini-ITX motherboard built around Intel Core Ultra Series 3 Panther Lake processors. It supports up to 128GB of DDR5 memory, NVMe storage, four DisplayPort outputs, optional wireless and cellular modules, multiple Ethernet ports including up to two 10GbE connections, serial interfaces, and PCIe expansion.

### Source excerpt

AAEON MIX-PTLWV1 is an industrial mini-ITX motherboard based on Intel Core Ultra Series 3 "Panther Lake" processors with up to two 10GbE and two 2.5GbE RJ45 jacks, and four 4K-capable DisplayPort video outputs. The motherboard also supports up to 128GB DDR5 C/SO-DIMM memory, M.2 NVMe SSD storage, optional WiFi and Bluetooth, and/or 4G LTE/5G cellular via M.2 modules, a PCIe Gen4 x8 slot for expansion, six serial interfaces, 12V-24V wide DC input, and more. AAEON MIX-PTLWV1 specifications: SoC - Intel Panther Lake processor (PTL-H404/PTL-H484 families) with Intel Xe LPG graphics; TDP: 15 to 25W System Memory - Up to 128GB via 2x 262-pin DDR5 C/SO-DIMM sockets up to 6400MHz (H404 SKU) or 7200MHz (H484 SKU) Storage - M.2 2280 M-Key (PCIe Gen4 x4) socket for NVMe SSD Display Interfaces 4x DisplayPort 1.4 up to 4096 x 2160 @ 60Hz 40-pin LVDS/eDP co-layout connector for Default: 18/24 bit dual-channel LVDS up [...] The post AAEON MIX-PTLWV1 Panther Lake industrial mini-ITX motherboard offers quad DisplayPort, dual 10GbE, and more appeared first on CNX Software - Embedded Systems News.

## Astera Labs Releases Leo 2 CXL Memory Controllers and Leo X Controller for Rackscale Fabric-Attached Memory

DevFeed: [Astera Labs Releases Leo 2 CXL Memory Controllers and Leo X Controller for Rackscale Fabric-Attached Memory](<https://devfeed.tech/articles/astera-labs-releases-leo-2-cxl-memory-controllers-and-leo-x-controller-for-rackscale-fabric-attached-memory-26778.md>)

Original publisher: [Read original article](<https://www.servethehome.com/astera-labs-releases-leo-2-cxl-memory-controllers-and-leo-x-controller-for-rackscale-fabric-attached-memory/>)

Author: Ryan Smith

Published: 2026-09-15T17:00:48Z

Content type: article

Language: en

Sources: [ServeTheHome](<https://devfeed.tech/sources/servethehome.md>)

Topics: [pcie](<https://devfeed.tech/topics/pcie.md>), [systems](<https://devfeed.tech/topics/systems.md>), [datacenter](<https://devfeed.tech/topics/datacenter.md>)

Tags: [astera-labs](<https://devfeed.tech/tags/astera-labs.md>), [cxl](<https://devfeed.tech/tags/cxl.md>), [data-center](<https://devfeed.tech/tags/data-center.md>), [ddr4](<https://devfeed.tech/tags/ddr4.md>), [ddr5](<https://devfeed.tech/tags/ddr5.md>), [leo](<https://devfeed.tech/tags/leo.md>), [memory](<https://devfeed.tech/tags/memory.md>), [other-components](<https://devfeed.tech/tags/other-components.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [releases](<https://devfeed.tech/tags/releases.md>), [server](<https://devfeed.tech/tags/server.md>)

### AI overview

Astera Labs is launching Leo 2 CXL smart memory controllers with DDR4 support and CXL 3.2/PCIe Gen6 connectivity, alongside the Leo-X controller for fabric-attached memory in rack-scale systems.

### Source excerpt

Astera Labs is launching a new generation of Leo smart memory controllers. The Leo 2 series adds support for CXL 3.2 and PCIe Gen6, while the ambitious Leo X brings the ability to attach memory expanders directly to the fabric networks of AI accelerators The post Astera Labs Releases Leo 2 CXL Memory Controllers and Leo X Controller for Rackscale Fabric-Attached Memory appeared first on ServeTheHome.

## A real-world comparison between Lenovo's ThinkBook 16p Gen 2 and 16p Gen 6 (with photos!)

DevFeed: [A real-world comparison between Lenovo's ThinkBook 16p Gen 2 and 16p Gen 6 (with photos!)](<https://devfeed.tech/articles/a-real-world-comparison-between-lenovo-s-thinkbook-16p-gen-2-and-16p-gen-6-with-photos-38576.md>)

Original publisher: [Read original article](<https://blog.jakelee.co.uk/thinkbook-gen-2-and-6-comparison/>)

Author: Jake Lee

Published: 2025-12-03T00:00:00Z

Content type: comparison

Language: en

Sources: [Jake Lee's Programming Blog](<https://devfeed.tech/sources/jake-lee-s-programming-blog.md>)

Topics: [lenovo](<https://devfeed.tech/topics/lenovo.md>), [Benchmark](<https://devfeed.tech/topics/benchmark.md>), [3dmark](<https://devfeed.tech/topics/3dmark.md>), [GPU](<https://devfeed.tech/topics/gpu.md>), [cpu](<https://devfeed.tech/topics/cpu.md>), [Hardware](<https://devfeed.tech/topics/hardware.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [Programming](<https://devfeed.tech/topics/programming.md>)

Tags: [3dmark](<https://devfeed.tech/tags/3dmark.md>), [benchmarks](<https://devfeed.tech/tags/benchmarks.md>), [comparison](<https://devfeed.tech/tags/comparison.md>), [cpu](<https://devfeed.tech/tags/cpu.md>), [gpu](<https://devfeed.tech/tags/gpu.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [laptop](<https://devfeed.tech/tags/laptop.md>), [lenovo](<https://devfeed.tech/tags/lenovo.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [performance](<https://devfeed.tech/tags/performance.md>), [technology](<https://devfeed.tech/tags/technology.md>), [tests](<https://devfeed.tech/tags/tests.md>)

### AI overview

A real-world comparison of the Lenovo ThinkBook 16p Gen 2 and Gen 6 examines specifications, photos, benchmarks, storage performance, and gaming results. The author reports substantial improvements in SSD and 3DMark performance, while noting that benchmark results may not fully represent everyday use.

### Source excerpt

I recently replaced my aging Lenovo ThinkBook 16p Gen 2 with a Gen 6, so here's benchmarks, side-by-side photos, and general notes on their differences!

## SSD Performance Has Advanced Faster Than Cloud Vendor NVMe Instances

DevFeed: [SSD Performance Has Advanced Faster Than Cloud Vendor NVMe Instances](<https://devfeed.tech/articles/ssds-have-become-ridiculously-fast-except-in-the-cloud-25084.md>)

Original publisher: [Read original article](<https://databasearchitects.blogspot.com/2024/02/ssds-have-become-ridiculously-fast.html>)

Author: Viktor Leis (noreply@blogger.com)

Published: 2024-02-19T08:00:00Z

Content type: opinion

Language: en

Sources: [Database Architects](<https://devfeed.tech/sources/database-architects.md>)

Topics: [Cloud](<https://devfeed.tech/topics/cloud.md>), [Amazon EC2](<https://devfeed.tech/topics/amazon-ec2.md>), [NVMe](<https://devfeed.tech/topics/nvme.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [datacenter](<https://devfeed.tech/topics/datacenter.md>)

Tags: [aws](<https://devfeed.tech/tags/aws.md>), [capacity](<https://devfeed.tech/tags/capacity.md>), [cloud](<https://devfeed.tech/tags/cloud.md>), [cost](<https://devfeed.tech/tags/cost.md>), [data-center](<https://devfeed.tech/tags/data-center.md>), [ec2](<https://devfeed.tech/tags/ec2.md>), [io](<https://devfeed.tech/tags/io.md>), [nvme](<https://devfeed.tech/tags/nvme.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [performance](<https://devfeed.tech/tags/performance.md>), [server](<https://devfeed.tech/tags/server.md>), [storage](<https://devfeed.tech/tags/storage.md>)

### AI overview

The article compares rapid advances in commodity PCIe and NVMe SSD performance with slower progress in cloud-based NVMe instances. It argues that AWS EC2 instance performance per SSD has remained around 2 GB/s since the i3 launch, leaving a substantial gap between leading data center SSDs and those offered by major cloud vendors.

### Source excerpt

In recent years, flash-based SSDs have largely replaced disks for most storage use cases. Internally, each SSD consists of many independent flash chips, each of which can be accessed in parallel. Assuming the SSD controller keeps up, the throughput of an SSD therefore primarily depends on the interface speed to the host. In the past six years, we have seen a rapid transition from SATA to PCIe 3.0 to PCIe 4.0 to PCIe 5.0. As a result, there was an explosion in SSD throughput: At the same time, we saw not just better performance, but also more capacity per dollar: The two plots illustrate the power of a commodity market. The combination of open standards (NVMe and PCIe), huge demand, and competing vendors led to great benefits for customers. Today, top PCIe 5.0 data center SSDs such as the Kioxia CM7-R or Samsung PM1743 achieve up to 13 GB/s read throughput and 2.7M+ random read IOPS. Modern servers have around 100 PCIe lanes, making it possible to have a dozen of SSDs (each usually using 4 lanes) in a single server at full bandwidth. For example, in our lab we have a single-socket Zen 4 server with 8 Kioxia CM7-R SSDs, which achieves 100GB/s (!) I/O bandwidth: AWS EC2 was an early NVMe pioneer, launching the i3 instance with 8 physically-attached NVMe SSDs in early 2017. At that time, NVMe SSDs were still expensive, and having 8 in a single server was quite remarkable. The per-SSD read (2 GB/s) and write (1 GB/s) performance was considered state of the art as well. Another step forward occurred in 2019 with the launch of i3en instances, which doubled storage capacity per dollar. Since then, several NVMe instance types, including i4i and im4gn, have been launched. Surprisingly, however, the performance has not increased; seven years after the i3 launch, we are still stuck with 2 GB/s per SSD. Indeed, the venerable i3 and i3en instances basically remain the best EC2 has to offer in terms of IO-bandwidth/$ and SSD-capacity/$, respectively. Personally, I find this very s

## Booting the Raspberry Pi 5 from NVMe

DevFeed: [Booting the Raspberry Pi 5 from NVMe](<https://devfeed.tech/articles/booting-the-raspberry-pi-5-from-nvme-26636.md>)

Original publisher: [Read original article](<https://blog.alexellis.io/booting-the-raspberry-pi-5-from-nvme/>)

Author: Alex Ellis

Published: 2023-12-28T17:55:43Z

Content type: tutorial

Language: en

Sources: [Alex Ellis' Blog](<https://devfeed.tech/sources/alex-ellis-blog.md>)

Topics: [NVMe](<https://devfeed.tech/topics/nvme.md>), [Raspberry Pi](<https://devfeed.tech/topics/raspberry-pi.md>), [boot](<https://devfeed.tech/topics/boot.md>), [Linux](<https://devfeed.tech/topics/linux.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [Ethernet](<https://devfeed.tech/topics/ethernet.md>), [Edge](<https://devfeed.tech/topics/edge.md>), [Google](<https://devfeed.tech/topics/google.md>), [Machine learning](<https://devfeed.tech/topics/machine-learning.md>)

Tags: [boot](<https://devfeed.tech/tags/boot.md>), [edge](<https://devfeed.tech/tags/edge.md>), [ethernet](<https://devfeed.tech/tags/ethernet.md>), [google](<https://devfeed.tech/tags/google.md>), [hdmi](<https://devfeed.tech/tags/hdmi.md>), [linux](<https://devfeed.tech/tags/linux.md>), [ml](<https://devfeed.tech/tags/ml.md>), [mount](<https://devfeed.tech/tags/mount.md>), [network](<https://devfeed.tech/tags/network.md>), [nvme](<https://devfeed.tech/tags/nvme.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [raspberry-pi](<https://devfeed.tech/tags/raspberry-pi.md>), [raspberry-pi-5](<https://devfeed.tech/tags/raspberry-pi-5.md>), [raspberry-pi-os](<https://devfeed.tech/tags/raspberry-pi-os.md>)

### AI overview

A practical workflow for configuring a Raspberry Pi 5 to boot Raspberry Pi OS from NVMe for headless use. The article discusses first-generation PCIe breakout boards, recommends flashing a fresh image instead of cloning a booted SD card, and outlines setup steps using Ethernet, HDMI, or network scanning.

### Source excerpt

Here's my workflow for setting up the Raspberry Pi 5 to boot from NVMe for headless use.

## PINE64 August Community Update Covers Collaborative Publishing and Hardware and Software Progress

DevFeed: [PINE64 August Community Update Covers Collaborative Publishing and Hardware and Software Progress](<https://devfeed.tech/articles/august-update-kept-you-waiting-huh-34879.md>)

Original publisher: [Read original article](<https://pine64.org/2023/08/15/august-update-kept-you-waiting-huh/>)

Published: 2023-08-15T00:00:00Z

Content type: news

Language: en

Sources: [Community blog on PINE64](<https://devfeed.tech/sources/community-blog-on-pine64.md>)

Topics: [Pinephone-Pro](<https://devfeed.tech/topics/pinephone-pro.md>), [Embedded Software Dev](<https://devfeed.tech/topics/embedded-software-dev.md>), [Pinephone](<https://devfeed.tech/topics/pinephone.md>), [Ubuntu](<https://devfeed.tech/topics/ubuntu.md>), [NVMe](<https://devfeed.tech/topics/nvme.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [USB](<https://devfeed.tech/topics/usb.md>), [ui](<https://devfeed.tech/topics/ui.md>)

Tags: [blog-post](<https://devfeed.tech/tags/blog-post.md>), [community](<https://devfeed.tech/tags/community.md>), [community-update](<https://devfeed.tech/tags/community-update.md>), [devices](<https://devfeed.tech/tags/devices.md>), [firmware](<https://devfeed.tech/tags/firmware.md>), [infinitime](<https://devfeed.tech/tags/infinitime.md>), [news](<https://devfeed.tech/tags/news.md>), [update](<https://devfeed.tech/tags/update.md>)

### AI overview

PINE64's August community update introduces collaborative authoring for future monthly posts and reviews recent progress across its devices and software. It covers PineTab2 and PineTab-V development, PinePhone Pro thermal-camera use, Ubuntu Touch, Quartz64 and SOQuartz, U-Boot support, PineTime and InfiniTime improvements, and related firmware and battery-life work.

### Source excerpt

We apologize for the lack of regular community updates during the past few months. In short, the people who usually wrote them became very busy. However, we have a new way to write and publish these updates, involving you: the community. Let's talk about it, and about so much more of what's been happening. This community update consists of contributions by Caffeine, CounterPillow, Funeral, gamiee, JF002, and mpreditor. N.B. Comments on the blog post need to be in English and follow our Community Rules and Code of Conduct. TL;DR Housekeeping Community updates are now written collaboratively by several members of the community The public is invited to contribute to the monthly update posts Rework of the community website and logo Newsflash megi released rk2aw: a loader for your bootloader Progress on the PineTab2 and PineTab-V A PinePhone Pro connected to a thermal imaging camera Oren Klopfer's progress on Ubuntu Touch Quartz64 and SOQuartz U-Boot improvements thanks to Kwiboo and CounterPillow: USB, NVMe, and soon PXE Improved SOQuartz CM4 baseboard compatibility Improved PCIe devices compatibility QuartzPro64 What it means to "mainline" things, and why it takes time Things that have been mainlined: SATA, PCIe, USB, AV1, and more! Things still being worked on: cpufreq, GPU, video output InfiniTime 1.13 and other PineTime news Heart rate monitoring improvements thanks to Ceimour! Did you know that InfiniTime has a BLE weather service feature? Improved memory management Huge improvements to battery life (with help from Ayke!) InfiniSim UI update Improvements to ITD, the InfiniTime daemon Ayke is developing a brand new firmware for the PineTime Housekeeping You might have been wondering why nothing new has been posted on the PINE64.org community blog in quite a few months. As was already revealed in the opening section, the reason is that previously blogs were mainly authored and edited by one person (Lukasz) and said person is extremely busy these days. Going forward,

## Diagnosing VR stutter with an eGPU on a laptop

DevFeed: [Diagnosing VR stutter with an eGPU on a laptop](<https://devfeed.tech/articles/egpu-stutter-from-hell-38996.md>)

Original publisher: [Read original article](<https://idea.popcount.org/2022-09-05-egpu-stutter-from-hell>)

Author: Marek

Published: 2022-09-04T22:00:00Z

Content type: opinion

Language: en

Sources: [Marek Majkowski](<https://devfeed.tech/sources/marek-majkowski.md>)

Topics: [GPU](<https://devfeed.tech/topics/gpu.md>), [Nvidia](<https://devfeed.tech/topics/nvidia.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [webgpu](<https://devfeed.tech/topics/webgpu.md>), [Windows](<https://devfeed.tech/topics/windows.md>), [debug](<https://devfeed.tech/topics/debug.md>)

Tags: [debugging](<https://devfeed.tech/tags/debugging.md>), [gpu](<https://devfeed.tech/tags/gpu.md>), [graphics](<https://devfeed.tech/tags/graphics.md>), [laptop](<https://devfeed.tech/tags/laptop.md>), [nvidia](<https://devfeed.tech/tags/nvidia.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [performance](<https://devfeed.tech/tags/performance.md>), [thunderbolt](<https://devfeed.tech/tags/thunderbolt.md>), [windows](<https://devfeed.tech/tags/windows.md>)

### AI overview

A laptop-based eGPU setup with an Nvidia 3080 caused severe stuttering in HTC Vive VR games despite the GPU functioning correctly. The article attributes the issue, with uncertainty, to Nvidia Optimus polling the laptop's other graphics hardware and interfering with smooth eGPU rendering.

### Source excerpt

eGPU stutter from hell I was able to put my hands on an HTC Vive VR headset. Sadly, my computers don't have a strong enough GPU for VR. Since I only have laptops I decided to secure an eGPU (external GPU) - a box with PCIe bus, connected over thunderbolt, which can house a proper big graphics card. I got Razer Core X.

## July Update: A Pinecil Evolved

DevFeed: [July Update: A Pinecil Evolved](<https://devfeed.tech/articles/july-update-a-pinecil-evolved-34867.md>)

Original publisher: [Read original article](<https://pine64.org/2022/07/28/july-update-a-pinecil-evolved/>)

Published: 2022-07-28T00:00:00Z

Content type: news

Language: en

Sources: [Community blog on PINE64](<https://devfeed.tech/sources/community-blog-on-pine64.md>)

Topics: [RISC-V](<https://devfeed.tech/topics/riscv.md>), [SOC](<https://devfeed.tech/topics/soc.md>), [cpu](<https://devfeed.tech/topics/cpu.md>), [GPU](<https://devfeed.tech/topics/gpu.md>), [Ethernet](<https://devfeed.tech/topics/ethernet.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [USB](<https://devfeed.tech/topics/usb.md>), [Development](<https://devfeed.tech/topics/development.md>)

Tags: [gigabit-ethernet](<https://devfeed.tech/tags/gigabit-ethernet.md>), [ota](<https://devfeed.tech/tags/ota.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [pinebuds](<https://devfeed.tech/tags/pinebuds.md>), [pinecil](<https://devfeed.tech/tags/pinecil.md>), [pinesounds](<https://devfeed.tech/tags/pinesounds.md>), [pinetime](<https://devfeed.tech/tags/pinetime.md>), [quartz64](<https://devfeed.tech/tags/quartz64.md>), [quartzpro64](<https://devfeed.tech/tags/quartzpro64.md>), [risc-v](<https://devfeed.tech/tags/risc-v.md>), [star64](<https://devfeed.tech/tags/star64.md>), [telemetry](<https://devfeed.tech/tags/telemetry.md>), [update](<https://devfeed.tech/tags/update.md>), [usb](<https://devfeed.tech/tags/usb.md>)

### AI overview

PINE64's July community update introduces Pinecil V2 and reviews Star64, a RISC-V single-board computer using the StarFive JH7110 CPU and BXE-2-32 GPU. It also reports progress on Quartz64, PineBuds, PineTime, and InfiniTime.

### Source excerpt

Welcome to the July community update - I hope you're staying cool in the heatwave. This month we're introducing the Pinecil V2 - an evolution of the original Pinecil - and taking a closer look at the Star64 RISC-V SBC. We also discuss Quartz64's development progress, the PineBuds and receive an update on PineTime and InfiniTime from JF. Let's get into it. You can watch the synopsis of this month's community update on YouTube (embedded below) as well as on Odysee and PeerTube. To stay up-to-date with PINE64 news make sure to subscribe to this blog (subscription widget at the bottom of the webpage), follow the PINE64 Telegram News channel, the announcements channel in Discord as well as our Twitter and Mastodon. I'd like to thank Alex (clover) Ben Brown (Ralim), pillow, JF and PizzaLovingNerd for their contributions to this community update. N.B. Comments on the blog post need to be in English and follow our Community Rules and Code of Conduct. https://www.youtube.com/watch?v=Tn4S1mdt7QQ July Update video synopsis TL;DR Housekeeping New PineTalk episode is out Quarterly Q&A on August 13, at 8:00PM CEST (UTC+2) Alternative payment methods available in Pine Store again The Pinebook Pro is available PINE64 EU has launched Pinecil (V2) New RISC-V SoC Adds BLE - opening potential for OTA updates & remote telemetry Automatic detection of tip resistance Compatible with existing peripherals and accessories, including cases Range of new, shorter 6.2ohm tips for higher power level IronOS already ported Counterfeit protection; future option for users to verify if their Pinecil V2 is legit Available very soon Star64 Congratulations to Gav for being the first to solve the riddle! Star64 is in final layout stages and we want to bring it to the market soon Uses StarFive JH7110 64bit CPU paired with BXE-2-32 GPU Available in 4 and 8GB RAM configuration Equipped with 2x Gigabit Ethernet ports (a variant with 1x GbE will be available later on for $5 less), PCIe, USB 3.0 as well as 2x U

## My DIY low-power 6 SSD NAS based on the Quartz64 ARM board

DevFeed: [My DIY low-power 6 SSD NAS based on the Quartz64 ARM board](<https://devfeed.tech/articles/my-diy-low-power-6-ssd-nas-based-on-the-quartz64-arm-board-34865.md>)

Original publisher: [Read original article](<https://pine64.org/2022/06/03/my-diy-low-power-6-ssd-nas-based-on-the-quartz64-arm-board/>)

Published: 2022-06-03T00:00:00Z

Content type: article

Language: en

Sources: [Community blog on PINE64](<https://devfeed.tech/sources/community-blog-on-pine64.md>)

Topics: [Server](<https://devfeed.tech/topics/server.md>), [Arm](<https://devfeed.tech/topics/arm.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [.NET 11](<https://devfeed.tech/topics/net-11.md>)

Tags: [diy](<https://devfeed.tech/tags/diy.md>), [gigabit-ethernet](<https://devfeed.tech/tags/gigabit-ethernet.md>), [low-power](<https://devfeed.tech/tags/low-power.md>), [nas](<https://devfeed.tech/tags/nas.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [pine64](<https://devfeed.tech/tags/pine64.md>), [quartz64](<https://devfeed.tech/tags/quartz64.md>), [rk3566](<https://devfeed.tech/tags/rk3566.md>), [ssd](<https://devfeed.tech/tags/ssd.md>)

### AI overview

A project report describes building a DIY low-power NAS around a Pine64 Quartz64 Model A, using its PCIe interface with a six-port SATA controller and an enclosure for six 2.5-inch SATA drives. The author reports that the tested SATA controller and Intel 4x GbE PCIe board worked out of the box, while raising power-supply considerations for operating six drives.

### Source excerpt

ARM SBCs have been around for a few years now. They were made popular and accessible mostly by the RaspberryPi released in 2012. I've been enjoying building countless projects around these boards : web servers, home-automation, camera recording, IM bots,... A new trend has recently appeared in the SBC world : the PCIe slot! The RaspberryPi 4 Compute Module exposes it via the IO board, and the Pine64 RockPro64 is equipped with a PCIe 4x open-ended slot directly on the board. I haven't had the opportunity to get hold of one of these boards, but I'm lucky enough to have a Quartz64 model A on hands. The Quartz64 is based on the Rockchip RK3566 running @1.8Ghz. My board is equipped with 8GB of RAM. It also has Gigabit ethernet, 1 SATA connector, USB3, and of course, the PCIe port. I experimented a bit with the PCIe interface by testing a couple of PCIe boards I had on hands at that time : the SATA controller board from Pine64 and an Intel 4x GBe board : they worked out of the box! Awesome, isn't it? 4xGbe PCIe card installed on the Quartz64 2 SSDs connected to the Quartz64 via the SATA controller boad I had an idea in the back of my mind : create a DIY low-power NAS based on a cheap SBC that can handle more than 2 drives (up to 6, preferably) without using USB. And it looks like this project is now completely possible! So... Let's do it! The prototype The first prototype was very rough : everything was laying on my desk, with all the wires dangling around. It was a bit messy, but it allowed me to check that the drives were working correctly. When I ensured that everything was working as expected, I bought a few more items : the SATA controller with 6 ports and an enclosure for 6 2.5" SATA drives. How to properly power an SBC and 6 drives? This question haunted me for some time. For now, the SBC is powered by a 12V power brick via a barrel connector. And the disks are powered by the board using those specific power cables by Pine64. If I understand correctly, this cable is co

## Asus ROG STRIX Z590-E GAMING WIFI - my UEFI BIOS settings

DevFeed: [Asus ROG STRIX Z590-E GAMING WIFI - my UEFI BIOS settings](<https://devfeed.tech/articles/asus-rog-strix-z590-e-gaming-wifi-my-uefi-bios-settings-27666.md>)

Original publisher: [Read original article](<https://gagor.pro/2021/10/asus-rog-strix-z590-e-gaming-wifi-my-uefi-bios-settings/>)

Author: Tom

Published: 2021-10-30T00:00:00Z

Content type: tutorial

Language: en

Sources: [Tomasz Gągor](<https://devfeed.tech/sources/tomasz-gagor.md>)

Topics: [UEFI](<https://devfeed.tech/topics/uefi.md>), [ASUS](<https://devfeed.tech/topics/asus.md>), [configuration](<https://devfeed.tech/topics/configuration.md>), [virtualization](<https://devfeed.tech/topics/virtualization.md>), [cpu](<https://devfeed.tech/topics/cpu.md>), [DDR4](<https://devfeed.tech/topics/ddr4.md>), [Linux](<https://devfeed.tech/topics/linux.md>), [NVMe](<https://devfeed.tech/topics/nvme.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [Security](<https://devfeed.tech/topics/security.md>), [Windows 11](<https://devfeed.tech/topics/windows-11.md>), [Artificial Intelligence](<https://devfeed.tech/topics/ai.md>)

Tags: [asus](<https://devfeed.tech/tags/asus.md>), [asus-rog-strix-z590-e-bios-settings](<https://devfeed.tech/tags/asus-rog-strix-z590-e-bios-settings.md>), [configuration](<https://devfeed.tech/tags/configuration.md>), [cpu](<https://devfeed.tech/tags/cpu.md>), [ddr4](<https://devfeed.tech/tags/ddr4.md>), [linux](<https://devfeed.tech/tags/linux.md>), [nvme](<https://devfeed.tech/tags/nvme.md>), [optimal-bios-settings](<https://devfeed.tech/tags/optimal-bios-settings.md>), [pc](<https://devfeed.tech/tags/pc.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [power-management-settings](<https://devfeed.tech/tags/power-management-settings.md>), [ram-overclocking](<https://devfeed.tech/tags/ram-overclocking.md>), [security](<https://devfeed.tech/tags/security.md>), [uefi](<https://devfeed.tech/tags/uefi.md>), [uefi-bios-configuration](<https://devfeed.tech/tags/uefi-bios-configuration.md>), [upgrade](<https://devfeed.tech/tags/upgrade.md>), [usb](<https://devfeed.tech/tags/usb.md>), [virtualization-settings](<https://devfeed.tech/tags/virtualization-settings.md>), [windows](<https://devfeed.tech/tags/windows.md>), [windows-11](<https://devfeed.tech/tags/windows-11.md>)

### AI overview

A configuration guide for the Asus ROG STRIX Z590-E GAMING WIFI motherboard's UEFI BIOS. It lists settings for RAM performance, power management, virtualization, TPM, storage, PCIe, USB, networking, and boot behavior.

### Source excerpt

Learn about the optimal UEFI BIOS settings for the Asus ROG STRIX Z590-E GAMING WIFI motherboard, including configurations for RAM, power management, virtualization, and more.

## psvsd: Custom Vita microSD card adapter

DevFeed: [psvsd: Custom Vita microSD card adapter](<https://devfeed.tech/articles/psvsd-custom-vita-microsd-card-adapter-22351.md>)

Original publisher: [Read original article](<https://yifan.lu/2017/08/22/psvsd-custom-vita-microsd-card-adapter/>)

Author: yifanlu

Published: 2017-08-22T07:00:00Z

Content type: article

Language: en

Sources: [Yifan Lu](<https://devfeed.tech/sources/yifan-lu.md>)

Topics: [Reverse Engineering](<https://devfeed.tech/topics/reverse-engineering.md>), [Hardware](<https://devfeed.tech/topics/hardware.md>), [USB](<https://devfeed.tech/topics/usb.md>), [pcie](<https://devfeed.tech/topics/pcie.md>), [Kernel](<https://devfeed.tech/topics/kernel.md>), [boot](<https://devfeed.tech/topics/boot.md>)

Tags: [debug](<https://devfeed.tech/tags/debug.md>), [development](<https://devfeed.tech/tags/development.md>), [enso](<https://devfeed.tech/tags/enso.md>), [hacking](<https://devfeed.tech/tags/hacking.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [henkaku](<https://devfeed.tech/tags/henkaku.md>), [kernel](<https://devfeed.tech/tags/kernel.md>), [pcb](<https://devfeed.tech/tags/pcb.md>), [pcie](<https://devfeed.tech/tags/pcie.md>), [reverse-engineering](<https://devfeed.tech/tags/reverse-engineering.md>), [usb](<https://devfeed.tech/tags/usb.md>), [vita](<https://devfeed.tech/tags/vita.md>)

### AI overview

This article describes reverse engineering work on the PlayStation Vita's hardware and software, including identifying UART debug connections and examining USB capabilities across Vita models. It discusses the 3G modem's custom mini-PCIe connector and related board connections.

### Source excerpt

One thing I love about Vita hacking is the depth of it. After investing so much time reverse engineering the software and hardware, you think you would run out of things to hack. Each loose end leads to another month long project. This all started in the development of HENkaku Ensō. We wanted an easy way to print debug statements early in boot. UART was a good candidate because the device initialization is very simple and the protocol is standard. The Vita SoC (likely called Kermit internally as we'll see later on) has seven UART ports. However, it is unlikely they are all hooked up on a retail console. After digging through the kernel code, I found that bbmc.skprx, the 3G modem driver contain references to UART. After a trusty FCC search, it turns out that the Vita's 3G modem uses a mini-PCIe connector but with a custom pin layout and a custom form factor. The datasheet gives some useful description for each pin, and UART_KERMIT seemed like the most likely candidate (there's also UART_SYSCON which is connected to the SCEI chip on the bottom of the board, which serves as a system controller and a UART_EXT which is not hooked up on the Vita side). So finding a debug output port was a success, but with the datasheet in front of me, the USB port caught my attention. Wouldn't it be neat to put in a custom USB device?

## New Hardware and Hacks

DevFeed: [New Hardware and Hacks](<https://devfeed.tech/articles/new-hardware-and-hacks-30826.md>)

Original publisher: [Read original article](<https://hookrace.net/blog/new-hardware-hacks/>)

Published: 2016-07-02T22:00:00Z

Content type: article

Language: en

Sources: [Dennis Felsing](<https://devfeed.tech/sources/dennis-felsing.md>)

Topics: [Hardware](<https://devfeed.tech/topics/hardware.md>), [pc](<https://devfeed.tech/topics/pc.md>), [cpu](<https://devfeed.tech/topics/cpu.md>), [intel](<https://devfeed.tech/topics/intel.md>), [pcie](<https://devfeed.tech/topics/pcie.md>)

Tags: [article](<https://devfeed.tech/tags/article.md>), [cpu](<https://devfeed.tech/tags/cpu.md>), [hardware](<https://devfeed.tech/tags/hardware.md>), [intel](<https://devfeed.tech/tags/intel.md>), [noctua](<https://devfeed.tech/tags/noctua.md>), [pc](<https://devfeed.tech/tags/pc.md>), [pcie](<https://devfeed.tech/tags/pcie.md>)

### AI overview

A personal account of building a compact, quiet Mini-ITX PC with Intel Skylake hardware, including the In Win Chopin case, its integrated 150 W power supply, and a Noctua NH-L9i CPU cooler. The article explains the author's design choices and plans to measure CPU temperatures.

### Source excerpt

In my latest post I showed some examples of how I ran mostly the same PC hardware over a period of 8 years. Today I finally finished setting up my new PC hardware in my new home, so I can report about what I did differently, my thought process, and some problems I encountered and hacks I did to solve them. I'm not sure if this article is interesting for anyone, but I had some fun setting the new system up and felt like writing about it, so here we go: Case I wanted a smaller case since the old one was a huge ATX tower with way too many useless ports and fans. I still want a pretty performant system, so an Intel NUC is out of the question. I don't need a GPU, since the most challenging graphics I need is DDNet client, which easily runs at 400 fps at 1920x1080 and 130 fps at 3840x2160 on Intel's HD Graphics 530 IGP integrated on Skylake CPUs. But it's still nice to have a PCIe port in case you ever need it. So Mini-ITX it is. Unfortunately the Streacom DB4 is not available yet, as it would have made for a beautiful silent Mini-ITX cube. Instead I went with the In Win Chopin, which is even smaller, features no GPU port and has a small integrated PSU rated at 150 W. I was a bit worried about the PSU being strong enough, but you can read more about that later in this post. There really aren't that many good-looking and reasonable Mini-ITX cases. The idea of the In Win Chopin is to use the CPU fan as the only fan to cool the entire case, pulling air directly from the side, pushing it out of the top. That's a stark contrast to my old machine with a total of 9 fans whirring inside the case. CPU Cooler Of course that means I need a good CPU cooler for the small space. With just 43 mm space for the cooler my choice fell on the Noctua NH-L9i. Unfortunately the manufacturer claims a 91 W Skylake CPU barely runs with the NH-L9i. So let's check out the CPU and measure some actual temperatures. Even though I switched to a small form factor, another goal of mine is still to keep th