# SOC A security operations center (SOC) is a centralized team or function that improves an organization's cybersecurity posture by preventing, detecting, and responding to threats. This is one page of public article previews, not the complete archive. Follow Next page to continue. Summaries are not the original full articles. ## New Linux Driver Coming To Improve ASUS Zenbook Snapdragon X2 Support DevFeed: [New Linux Driver Coming To Improve ASUS Zenbook Snapdragon X2 Support]() Original publisher: [Read original article]() Author: Michael Larabel Published: 2026-09-17T12:04:09Z Content type: news Language: en Sources: [Phoronix]() Topics: [ASUS](), [Linux](), [Qualcomm](), [Kernel](), [SOC](), [patches](), [Embedded Software Dev]() Tags: [asus](), [desktop-linux](), [driver](), [embedded](), [firmware](), [kernel](), [keyboard](), [linux](), [linux-benchmarking](), [linux-hardware-benchmarks](), [linux-hardware-reviews](), [linux-how-to](), [linux-performance](), [linux-server-benchmarks](), [open-source-graphics](), [patches](), [phoronix](), [phoronix-test-suite](), [qualcomm](), [soc](), [suspend](), [testing](), [ubuntu-benchmarks](), [ubuntu-hardware]() ### AI overview Qualcomm developer Konrad Dybcio posted Linux kernel patches for a new asus-glymur-ec driver to improve embedded-controller support on Snapdragon X2-powered ASUS Zenbook A14 and A16 laptops. The driver can report fan speeds and temperatures, control keyboard backlight brightness, and handle suspend and resume notifications. ### Source excerpt For those hopeful of running Linux well on the ASUS Zenbook A14 or A16 laptops powered by the latest Qualcomm Snapdragon X2 SoC, a new ASUS EC driver has been developed for enhancing the support... ## Ubuntu 26.10 Set To Deliver Better Performance For Intel Core 3 Wildcat Lake DevFeed: [Ubuntu 26.10 Set To Deliver Better Performance For Intel Core 3 Wildcat Lake]() Original publisher: [Read original article]() Author: Michael Larabel Published: 2026-09-15T15:34:07Z Content type: comparison Language: en Sources: [Phoronix]() Topics: [Ubuntu](), [Intel Core](), [intel](), [Hardware](), [Linux](), [SOC]() Tags: [comparison](), [core](), [desktop-linux](), [graphics](), [hardware](), [intel-core](), [kernel](), [linux-benchmarking](), [linux-hardware-benchmarks](), [linux-hardware-reviews](), [linux-how-to](), [linux-performance](), [linux-server-benchmarks](), [nvme](), [open-source-graphics](), [performance](), [phoronix](), [phoronix-test-suite](), [release](), [soc](), [software](), [ubuntu](), [ubuntu-benchmarks](), [ubuntu-hardware](), [updates](), [upgrade](), [upgrades](), [wildcat-lake]() ### AI overview The article compares Ubuntu 26.04 LTS with Ubuntu 26.10 in development on a CHUWI UniBook equipped with an Intel Core 3 304 SoC, 8GB of RAM, and a 256GB NVMe SSD. It reports that Ubuntu 26.10's newer Linux kernel, Mesa graphics stack, and other software upgrades are expected to improve performance on Intel Wildcat Lake hardware. ### Source excerpt While Ubuntu 26.04 LTS is working fine out-of-the-box on new Intel Core 3 "Wildcat Lake" laptops like the CHUWI UniBook, next month's release of Ubuntu 26.10 will help deliver better performance out of these low-cost laptop options. ## The only perfect Endpoint Prevention and Response (EPR) score in 2026 belongs to Elastic DevFeed: [The only perfect Endpoint Prevention and Response (EPR) score in 2026 belongs to Elastic]() Original publisher: [Read original article]() Author: Mia LaVada Published: 2026-09-15T00:00:00Z Content type: article Language: en Sources: [Elastic Blog - Elasticsearch, Kibana, and ELK Stack]() Topics: [Endpoint Security & XDR](), [Testing](), [Security](), [SOC]() Tags: [2026](), [alert-fatigue](), [analysts](), [investigation-incident-response-security-compliance-security-analytics-xdr](), [obfuscation](), [persistence](), [protection](), [security](), [security-endpoint-security](), [soc](), [techniques](), [testing](), [tooling](), [usb]() ### AI overview Elastic describes its results in the 2026 AV-Comparatives Endpoint Prevention and Response test, reporting 100% protection scores, zero false alerts, and the lowest modeled operational footprint among tested products. The article explains that Elastic stopped all 50 attack scenarios at the initial phase. ### Source excerpt Elastic sits at the very top of this year's AV-Comparatives' CyberRisk Quadrant within the 2026 Endpoint Prevention and Response (EPR) test with the highest protection scores at 100%. Learn more. ## CrowdStrike Named Strongest Overall Leader in 2026 Frost Radar™: Cloud Workload Protection Platforms DevFeed: [CrowdStrike Named Strongest Overall Leader in 2026 Frost Radar™: Cloud Workload Protection Platforms]() Original publisher: [Read original article]() Author: Brett Shaw Published: 2026-09-12T11:17:51.295154Z Content type: article Language: en Sources: [Blog]() Topics: [workload protection](), [Security & compliance, Cloud security](), [Security](), [telemetry](), [Containers](), [Kubernetes](), [SOC]() Tags: [2026](), [cloud](), [cloud-application-security](), [cloud-security](), [containers](), [growth](), [innovation](), [kubernetes](), [real-time](), [security](), [soc](), [telemetry](), [workload-protection]() ### AI overview CrowdStrike says Frost & Sullivan named it the strongest overall leader in the 2026 Frost Radar for Cloud Workload Protection Platforms. The article highlights Falcon Cloud Security's focus on connecting risk, adversary intelligence, and real-time protection across containers, Kubernetes, identities, cloud control planes, endpoints, and SOC operations. ### Source excerpt Falcon Cloud Security earned the highest scores in both Innovation and Growth by connecting risk, adversary intelligence, and real-time protection to stop attacks. ## CrowdStrike Delivers the Next Evolution of the Agentic SOC DevFeed: [CrowdStrike Delivers the Next Evolution of the Agentic SOC]() Original publisher: [Read original article]() Author: Brandon Benke Published: 2026-09-12T11:17:51.295154Z Content type: article Language: en Sources: [Blog]() Topics: [Agentic SOC](), [SOC](), [Security](), [Artificial Intelligence](), [Automation](), [data](), [real-time](), [Reconnaissance](), [Cloud](), [Network]() Tags: [2026](), [agentic](), [agentic-soc](), [agents](), [ai](), [automation](), [cloud](), [data](), [identity](), [network](), [operations](), [platform](), [real-time](), [saas](), [security](), [soc]() ### AI overview CrowdStrike describes the next evolution of its agentic SOC, where analysts and AI agents work together in a unified system to investigate and respond to threats in real time. The Falcon platform combines data generation, enrichment, investigation, orchestration, and governance, with capabilities for detection-ready third-party data and coordinated specialist agents. ### Source excerpt Expert agents that reason together, learn your environment, and run on data CrowdStrike owns. See how we deliver the agentic SOC. Learn more! ## Building an Agentic SOC on a Stream DevFeed: [Building an Agentic SOC on a Stream]() Original publisher: [Read original article]() Author: Pavel Lineitsev Published: 2026-09-10T19:19:05Z Content type: article Language: en Sources: [Confluent: Data in motion]() Topics: [Agentic SOC](), [SOC](), [Security](), [Streaming](), [Architecture & Design](), [Artificial Intelligence](), [Automation](), [data loss prevention]() Tags: [agent](), [agentic](), [agentic-soc](), [agents](), [ai](), [ai-agents](), [architecture](), [automation](), [confluent-cloud](), [data-loss-prevention](), [security](), [security-tools](), [soc](), [streaming]() ### AI overview This article describes an Agentic SOC that uses AI agents and a continuous streaming architecture to investigate security alerts. Its pipeline combines central triage, specialized evidence agents, adversarial evaluation, and a self-learning knowledge base to analyze every alert, escalate higher-value cases, and surface true positives for analyst review. The approach is intended to address the backlog of low-priority alerts, including Data Loss Prevention alerts, whose volume makes manual investigation impractical. ### Source excerpt Discover how our security team built an automated multi-agent investigation pipeline that scaled alert triage throughput using a continuous streaming architecture. ## Redefining Digital Resilience in the AI Era DevFeed: [Redefining Digital Resilience in the AI Era]() Original publisher: [Read original article]() Author: Kamal Hathi Published: 2026-09-10T17:00:15Z Content type: news Language: en Sources: [Cisco Blogs]() Topics: [Resilience](), [Artificial Intelligence](), [data](), [Architecture & Design](), [Security](), [SOC](), [monitor]() Tags: [agentic-ai-security](), [agentic-ops](), [agentic-security](), [ai](), [ai-agents](), [autonomous](), [cost](), [digital-resilience](), [executive-platform](), [governance](), [monitor](), [observability](), [resilience](), [scale](), [security](), [soc](), [speed](), [workflows]() ### AI overview Splunk is evolving its data platform for the AI era, focusing on digital resilience, trusted autonomous agents, machine-speed security operations, and economically governed AI workflows. ### Source excerpt Splunk is evolving for the AI era - removing constraints to help customers achieve digital resilience and leverage AI with speed, scale and trust. ## LattePanda Mu Ultra Compute Module features Intel Core Ultra 5 226V/7 256V Lunar Lake CPU for AI workloads DevFeed: [LattePanda Mu Ultra Compute Module features Intel Core Ultra 5 226V/7 256V Lunar Lake CPU for AI workloads]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-10T02:25:10Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Embedded Systems](), [Hardware](), [intel](), [cpu](), [GPU](), [ddr5](), [x86](), [SOC]() Tags: [2-5gbe](), [3dmark](), [artificial-intelligence-ai](), [benchmarks](), [cpu](), [ddr5](), [development-board](), [devkit](), [dfrobot](), [edge-ai](), [embedded-systems](), [geekbench](), [gpu](), [hardware](), [intel](), [intel-core](), [linux](), [lunar-lake](), [som](), [ubuntu](), [wifi-6](), [wifi-7](), [windows-11]() ### AI overview CNX Software reports on the LattePanda Mu Ultra, an x86 compute module using Intel Core Ultra 5 226V or Ultra 7 256V Lunar Lake processors with 16GB of memory. It targets robotics, industrial automation, portable instruments, and vision and edge AI applications, with up to 115 TOPS of stated AI performance. ### Source excerpt The LattePanda Mu Ultra is an x86 Compute Module powered by an Intel Core Ultra 5 226V or Ultra 7 256V Lunar Lake processor and equipped with 16GB of DDR5 memory. Offered in the same compact 69.6 x 60mm form factor as the earlier LattePanda Mu Alder Lake-N system-on-module (N100 or Core i3-N305), it delivers much higher performance, including up 115 TOPS of AI performance. Target applications include robotics, industrial automation, portable instruments, vision AI, and a range of Edge AI applications. LattePanda Mu Ultra Specifications: Lunar Lake SoC (one or the other) Intel Core Ultra 5 Processor 226V CPU - Octa-core processor up to 4.5 GHz GPU - 7x Xe-core Intel Arc 130V GPU up to 1.85 GHz AI - 40 TOPS Intel AI Boost; combined up to 97 TOPS Intel Core Ultra 7 Processor 256V CPU - Octa-core processor up to 4.8 GHz GPU - 8x Xe-core Intel Arc [...] The post LattePanda Mu Ultra Compute Module features Intel Core Ultra 5 226V/7 256V Lunar Lake CPU for AI workloads appeared first on CNX Software - Embedded Systems News. ## ESP32-C5 Pico board follows Raspberry Pi Pico form factor, ships with on-board or external antenna DevFeed: [ESP32-C5 Pico board follows Raspberry Pi Pico form factor, ships with on-board or external antenna]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-09T07:00:50Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [ESP32-C5](), [Raspberry Pi](), [Espressif](), [cpu](), [RISC-V](), [SOC](), [Bluetooth](), [wifi 6](), [zigbee](), [Matter](), [Embedded Systems](), [ESP-IDF]() Tags: [802-15-4](), [arduino](), [battery](), [ble](), [bluetooth](), [bluetooth-le](), [boot](), [c-c-plus-plus](), [development-board](), [embedded-systems](), [esp-idf](), [esp32](), [esp32-c5](), [espressif](), [gpio](), [hardware](), [iot](), [matter](), [news](), [port](), [raspberry-pi](), [risc-v](), [thread](), [usb](), [waveshare](), [wifi-6](), [zigbee]() ### AI overview The Waveshare ESP32-C5 Pico is a development board in the Raspberry Pi Pico form factor. It uses an ESP32-C5-MINI-1 series module with a RISC-V processor, dual-band WiFi 6, Bluetooth LE, and 802.15.4 support for Zigbee, Thread, and Matter. The board includes GPIO headers, USB-C, buttons, LEDs, and Li-Ion battery support, with variants offering PCB or external antennas. ### Source excerpt Waveshare ESP32-C5 Pico board brings the ESP32-C5 dual-band WiFi 6, Bluetooth LE, and 802.15.4 (Zigbee/Thread) SoC to the Raspberry Pi Pico form factor. The board features an ESP32-C5-MINI-1 Series module with PCB or external antenna, two 20-pin GPIO headers, a USB-C port for power and programming, Reset and Boot buttons, and a few LEDs. It also supports Li-Ion battery charging and discharging. Waveshare ESP32-C5 Pico specifications: Wireless module - ESP32-C5-MINI-1 or ESP32-C5-MINI-1U Wireless MCU - Espressif Systems ESP32-C5HF4 CPU Single-core 32-bit RISC-V processor @ up to 240 MHz Low-power RISC-V core @ 48 MHz acting as the main processor for power-sensitive applications Memory - 384 KB SRAM on-chip Storage - 320 KB ROM, 4MB SPI flash Wireless Dual-band (2.4/5 GHz) 802.11ax WiFi 6, 802.11b/g/n WiFi 4 backward compatibility WiFi modes: Station mode, SoftAP mode, SoftAP + Station mode, and promiscuous mode Bluetooth 5.0 Low Energy (LE) with Mesh support, up [...] The post ESP32-C5 Pico board follows Raspberry Pi Pico form factor, ships with on-board or external antenna appeared first on CNX Software - Embedded Systems News. ## YuzukiNeko - A Linux-capable Allwinner F101 RISC-V SBC with Raspberry Pi Pico form factor DevFeed: [YuzukiNeko - A Linux-capable Allwinner F101 RISC-V SBC with Raspberry Pi Pico form factor]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-07T17:01:57Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Raspberry Pi](), [Linux](), [RISC-V](), [Hardware](), [SOC](), [Embedded Systems](), [Open Source](), [Kernel](), [Software]() Tags: [allwinner](), [allwinner-d-series](), [buildroot](), [cpu](), [embedded-systems](), [gpio](), [hardware](), [linux](), [linux-7-x](), [mipi](), [open-source](), [psram](), [raspberry-pi](), [risc-v](), [single-board-computer](), [specifications](), [spi](), [storage](), [usb](), [zephyr](), [zephyr-os]() ### AI overview YuzukiHD has introduced YuzukiNeko, a Raspberry Pi Pico-sized open-source single-board computer built around the Allwinner F101 RISC-V SoC. It includes a 1.008 GHz C907 core, 8MB or 16MB PSRAM, SPI NOR flash, microSD storage, USB-C, and GPIO expansion, with support for Linux, Buildroot, and Zephyr RTOS. ### Source excerpt YuzukiHD has made another open-source hardware Linux SBC. YuzukiNeko is a Raspberry Pi Pico-sized single board computer powered by a new Allwinner F101 RISC-V SoC. The Allwinner F101 processor features a single 1.008 GHz C907 RISC-V core, 8MB or 16 MB PSRAM, and support for various display interfaces such as MIPI DSI, 24-bit RGB, and LVDS. The YuzukiNeko board itself features the F101 SoC, an SPI NOR flash, a microSD card for storage, a USB-C port, and two 20-pin GPIO headers. YuzukiNeko specifications: SoC - Allwinner F101 CPU - T-head C907 RISC-V core up to 1.008 GHz Memory - 8MB or 16MB PSRAM @ 252 MHz Package - QFN-68 Storage 128 Mbit NOR flash (PY25Q128HA-SUH-IT) MicroSD card slot USB - USB Type-C port for data, power, and programming Expansion 2x 20-pin expansion headers with GPIOs, ADC, 5V, 3.3V, and GND 5x pads with HP out (analog speaker output) and four [...] The post YuzukiNeko - A Linux-capable Allwinner F101 RISC-V SBC with Raspberry Pi Pico form factor appeared first on CNX Software - Embedded Systems News. ## Amlogic A311Y3 Cortex-A78/A55 Edge AI system-on-module delivers up to 8 TOPS DevFeed: [Amlogic A311Y3 Cortex-A78/A55 Edge AI system-on-module delivers up to 8 TOPS]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-03T13:46:18Z Content type: article Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Embedded Systems](), [Artificial Intelligence](), [cpu](), [SOC](), [GPU](), [RISC-V](), [SDK](), [Android](), [Linux]() Tags: [2025](), [4g-lte](), [amlogic](), [android](), [arm](), [boardcon](), [camera](), [compiler](), [cortex-a55](), [cortex-a78](), [cpu](), [development-board](), [development-tools](), [display](), [edge-ai](), [edge-computing](), [embedded](), [embedded-systems](), [hardware](), [linux](), [npu](), [opencl](), [risc-v](), [rs485](), [som](), [specifications](), [vulkan]() ### AI overview The article examines Boardcon's CM311Y3 system-on-module, which uses the Amlogic A311Y3 octa-core SoC with Cortex-A78 and Cortex-A55 CPUs, an 8 TOPS NPU, LPDDR5 memory, eMMC storage, and interfaces for embedded applications. It also describes the module's development board, software support, and key specifications. ### Source excerpt Boardcon CM311Y3 system-on-module (SoM) is powered by an Amlogic A311Y3 octa-core Cortex-A78/A55 SoC with an 8 TOPS NPU and targets 4K video surveillance systems, AI edge computing devices, interactive terminals, enterprise thin clients, and autonomous robots. The module comes with up to 16GB LPDDR5 and up to 256 GB eMMC flash, exposes 210 pins through castellated edges, and a development board is also provided for evaluation and early software development. We don't often see new SoMs or SBCs based on Amlogic SoCs these days, so let's have a closer look. Boardcon CM311Y3 System-on-Module CM311Y3 specifications: SoC - Amlogic A311Y3 CPU 2x ARM Cortex-A78 cores @ 2.4GHx 6x ARM Cortex-A55 cores @ 2.0GHz RISC-V core for system control processing RISC-V core for Always-on power management and Sensor Hub GPU - Arm Mali-G625 MC1 with support for OpenGL ES 3.2, Vulkan 1.4, and OpenCL 3.0 VPU Video Decoder - H.264 up to [...] The post Amlogic A311Y3 Cortex-A78/A55 Edge AI system-on-module delivers up to 8 TOPS appeared first on CNX Software - Embedded Systems News. ## Circuit Valley CHC5 - A modular USB, HDMI, and Ethernet camera system (Crowdfunding) DevFeed: [Circuit Valley CHC5 - A modular USB, HDMI, and Ethernet camera system (Crowdfunding)]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-02T07:25:10Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [webcam](), [Hardware](), [USB](), [hdmi](), [Ethernet](), [SOC](), [Embedded Systems](), [Linux](), [SDK](), [Open Source]() Tags: [arm](), [buildroot](), [c-c-plus-plus](), [camera](), [computer-vision](), [edge-ai](), [embedded-systems](), [ethernet](), [fpga](), [hardware](), [hdmi](), [kickstarter](), [linux](), [open-source](), [poe](), [sdk](), [soc](), [usb](), [video](), [xilinx-zynq]() ### AI overview CNX Software reports on Circuit Valley's CHC5, a modular camera system built around an AMD/Xilinx Zynq-7020 SoC FPGA. It supports interchangeable sensor and lens configurations, USB, HDMI, and Gigabit Ethernet interfaces, and image-processing and machine-vision workloads. ### Source excerpt Circuit Valley's CHC5 is a modular camera system based on a Core board powered by an AMD/Xilinx Zynq-7020 SoC FPGA, a range of interface boards with USB, HDMI, or Ethernet (PoE), various sensor boards, and a metal enclosure. The solution can be customized with different lens objectives and different sensors with MIPI D-PHY, LVDS, Sub-LVDS, Low Voltage LVDS, or SLVS interfaces. The Zynq-7020's Cortex-A9 cores can handle complex tasks, while the FPGA fabric takes care of high-speed calculation and correction on the image, and can also be leveraged for AI/machine-vision-specific algorithms or complex low-latency hardware acceleration. CHC5 specifications: Core board SoC - Xilinx AMD Zynq-7020 SoC FPGA CPU - Dual-core Arm Cortex-A9 processor FPGA - 85K logic cells, 4.9Mb Block RAM, 220 DSP slices System Memory - 1GB DDR3 Storage 1 Gbit flash memory MicroSD card slot ISP - Full-fledged ISP implemented on FPGA fabric Multiple interface boards with 10Gbps [...] The post Circuit Valley CHC5 - A modular USB, HDMI, and Ethernet camera system (Crowdfunding) appeared first on CNX Software - Embedded Systems News. ## ArmSoM Sige6 Allwinner A733 SBC features up to 128GB soldered-on eMMC flash, 16GB LPDDR5 DevFeed: [ArmSoM Sige6 Allwinner A733 SBC features up to 128GB soldered-on eMMC flash, 16GB LPDDR5]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-09-01T06:41:00Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Embedded Systems](), [SOC](), [cpu](), [GPU](), [RISC-V](), [real-time](), [Artificial Intelligence](), [wifi 6](), [Linux](), [Android]() Tags: [allwinner](), [allwinner-a-series](), [android](), [android-13](), [armbian](), [banana-pi](), [bluetooth](), [core](), [cortex-a55](), [cpu](), [debian](), [embedded-systems](), [gigabit-ethernet](), [gpu](), [hardware](), [hdmi](), [linux](), [npu](), [real-time](), [risc-v](), [single-board-computer](), [usb](), [wifi-6]() ### AI overview The ArmSoM Sige6 is a credit-card-sized single-board computer based on the Allwinner A733-HN3 SoC. It offers up to 16GB of LPDDR5 memory and 128GB of soldered eMMC storage, along with PCIe, Gigabit Ethernet, Wi-Fi 6, Bluetooth 5.4, display and camera interfaces, USB ports, and a 40-pin expansion header. ### Source excerpt ArmSoM Sige6 is yet another SBC powered by the Allwinner A733 octa-core SoC, offered in a credit card form factor with up to 128GB soldered-on eMMC flash and up to 16GB LPDDR5. The single board computer features a microSD card slot and an M.2 M-key PCIe 3.0 x2 slot for storage, Gigabit Ethernet (with optional PoE), WiFi 6, and Bluetooth 5.4 connectivity, HDMI 2.0 and MIPI DSI display interfaces, a MIPI CSI camera interface, USB 3.0/2.0 ports, a 3.5mm audio jack, a 40-pin GPIO header, and more. ArmSom Sige6 specifications: SoC - Allwinner A733-HN3 CPU Dual-core Arm Cortex-A76 @ up to 2.00 GHz Hexa-core Arm Cortex-A55 @ up to 1.80 GHz Single-core RISC-V E902 real-time core GPU - Imagination Technologies BXM-4-64 MC1 GPU with support for OpenGL ES 3.2, Vulkan 1.3, and OpenCL 3.0 VPU 4Kp60/8Kp24 H.265/VP9/AVS2 decoding, 4Kp30 H.264 decoding 4Kp30 H.265/H.264 encoding AI accelerator - 3 TOPS NPU Process [...] The post ArmSoM Sige6 Allwinner A733 SBC features up to 128GB soldered-on eMMC flash, 16GB LPDDR5 appeared first on CNX Software - Embedded Systems News. ## D-Robotics RDK S100P - A 128 TOPS alternative to NVIDIA Jetson Orin NX 16GB with Cortex-A78AE/R52+ cores DevFeed: [D-Robotics RDK S100P - A 128 TOPS alternative to NVIDIA Jetson Orin NX 16GB with Cortex-A78AE/R52+ cores]() Original publisher: [Read original article]() Author: Debashis Das Published: 2026-08-31T08:06:13Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Jetson](), [Robotics](), [Embedded Systems](), [Microcontroller](), [Jetson Orin](), [SOC](), [cpu](), [Arm](), [real-time](), [GPU](), [Linux](), [Nvidia]() Tags: [arm](), [artificial-intelligence-ai](), [camera](), [computer-vision](), [cortex-a78](), [cpu](), [deep-learning](), [development-kit](), [dfrobot](), [edge-ai](), [embedded](), [embedded-systems](), [gpu](), [hardware](), [jetson](), [jetson-orin](), [linux](), [mcu](), [networking](), [nvidia](), [os](), [processors](), [real-time](), [robotics](), [ros](), [safety](), [sensor](), [sensors](), [single-board-computer](), [soc](), [software](), [som](), [specifications](), [systems](), [ubuntu]() ### AI overview The D-Robotics RDK S100P is a robotics single-board computer featuring a 6-core Cortex-A78AE CPU, 4-core Cortex-R52+ MCU domain, 128 TOPS INT8 Nash BPU, Mali-G78AE GPU, and 24 GB of LPDDR5. Its MCU supports real-time motor and sensor control, potentially reducing the need for a separate real-time controller depending on the robot's requirements. ### Source excerpt D-Robotics RDK S100P development kit is a robotics SBC built around an S100P-based module providing an alternative to NVIDIA Jetson Orin NX 16GB with a 6-core Cortex-A78AE application cluster, a 4-core Cortex-R52+ MCU domain, a Nash BPU rated at 128 TOPS INT8, a Mali-G78AE GPU, and 24 GB of LPDDR5. The four R52+ cores can be configured for reliable real-time control: two cores run in lockstep for safety, and the other two support split-lock operation. In practice, the A78AE CPU and BPU can handle Linux and vision processing, while the MCU handles time-critical tasks such as motor and sensor I/O. This can reduce the need for a separate real-time controller, although whether it eliminates one depends on the robot and its requirements. RDK S100P specifications: SoC - D-Robotics S100P CPU - 6x Arm Cortex-A78AE @ 2.0 GHz (safety-capable AE cores) MCU - 4x Arm Cortex-R52+ @ 1.2 GHz (1x DCLS [...] The post D-Robotics RDK S100P - A 128 TOPS alternative to NVIDIA Jetson Orin NX 16GB with Cortex-A78AE/R52+ cores appeared first on CNX Software - Embedded Systems News. ## Orange Pi Zero 4 - Compact Allwinner A733 SBC offers HDMI, USB-C DP, GbE, WiFI 6, PCIe FFC connector for $26.5 and up DevFeed: [Orange Pi Zero 4 - Compact Allwinner A733 SBC offers HDMI, USB-C DP, GbE, WiFI 6, PCIe FFC connector for $26.5 and up]() Original publisher: [Read original article]() Author: Jean-Luc Aufranc (CNXSoft) Published: 2026-08-31T07:13:46Z Content type: news Language: en Sources: [CNX Software - Embedded Systems News]() Topics: [Embedded Systems](), [SOC](), [Arm](), [cpu](), [wifi 6](), [GPU](), [Bluetooth](), [RISC-V](), [hdmi](), [USB](), [Ethernet](), [OpenGL]() Tags: [allwinner](), [allwinner-a-series](), [android](), [arm](), [armbian](), [bluetooth](), [cortex-a55](), [cpu](), [debian](), [embedded-systems](), [gigabit-ethernet](), [gpu](), [h-264](), [hardware](), [hdmi](), [linux](), [npu](), [opencl](), [orange-pi](), [pcie](), [single-board-computer](), [specifications](), [ubuntu](), [usb](), [vp9](), [vulkan](), [wifi-6]() ### AI overview The Orange Pi Zero 4 is a compact single-board computer based on the Allwinner A733, with up to 8GB of memory, eMMC or UFS storage support, mini HDMI, USB-C DisplayPort, Gigabit Ethernet, Wi-Fi 6, Bluetooth 5.4, camera interfaces, GPIO, and a PCIe FFC connector. The article lists its specifications, planned operating-system images, and expected Armbian support. ### Source excerpt Orange Pi Zero 4 is an affordable yet feature-rich Allwinner A733 single board computer (SBC) with up to 8GB RAM, eMMC/UFS storage footprint, a microSD card slot, and plenty of I/Os. The board packs mini HDMI and USB-C DisplayPort, Gigabit Ethernet, WiFi 6 and Bluetooth 5.4, two MIPI CSI camera connectors, a Raspberry Pi-style PCIe FFC connector, and two GPIO headers into a compact 55x50mm form factor. Orange Pi Zero 4 specifications: SoC - Allwinner A733 CPU Dual-core Arm Cortex-A76 @ up to 2.00 GHz Hexa-core Arm Cortex-A55 @ up to 1.79 GHz Single-core RISC-V E902 real-time core up to 200 MHz GPU - Imagination Technologies BXM-4-64 MC1 GPU with support for OpenGL ES 3.2, Vulkan 1.3, OpenCL 3.0 VPU 8Kp24 H.265/VP9/AVS2 decoding 4Kp30 H.265/H.264 encoding AI accelerator - 3 TOPS NPU System Memory - 1GB, 2GB, 4GB, 6GB, or 8GB LPDDR5/LPDDR4/LPDDR4x; note: 16GB is also listed in the specs, [...] The post Orange Pi Zero 4 - Compact Allwinner A733 SBC offers HDMI, USB-C DP, GbE, WiFI 6, PCIe FFC connector for $26.5 and up appeared first on CNX Software - Embedded Systems News. ## Hot Chips 2026: Intel's Wildcat Lake DevFeed: [Hot Chips 2026: Intel's Wildcat Lake]() Original publisher: [Read original article]() Author: Chester Lam Published: 2026-08-24T19:50:30Z Content type: article Language: en Sources: [Chips and Cheese]() Topics: [intel](), [cpu](), [GPU](), [SOC](), [Bluetooth]() Tags: [2026](), [architecture](), [battery](), [bluetooth](), [core](), [cost](), [cpu](), [gpu](), [intel](), [platform](), [processors](), [soc](), [technologies](), [technology](), [wifi](), [wildcat-lake]() ### AI overview This article examines how Intel designed Wildcat Lake, also called Core Series 3, as a lower-cost mobile processor platform. It describes the use of new CPU cores, Xe3 graphics, IO, a multi-chip package, a distinct platform, and selected feature trade-offs to reduce costs while retaining capabilities important to battery life and connectivity. ### Source excerpt All about making things affordable ## Compliance documents are now available in Team settings DevFeed: [Compliance documents are now available in Team settings]() Original publisher: [Read original article]() Author: Will Sather Published: 2026-08-19T00:00:00Z Content type: release Language: en Sources: [Vercel News]() Topics: [Security](), [Vercel](), [SOC]() Tags: [compliance](), [documentation](), [enterprise](), [security](), [security-policies](), [soc-2](), [trust-center](), [vercel]() ### AI overview Vercel added a Compliance section to Team settings, allowing users to preview and download compliance documents such as SOC 2 Type 2 attestations and security policies. Downloads and previews are watermarked, and the feature is available on Pro and Enterprise plans. ### Source excerpt A new Compliance section in Team settings lets you preview and download Vercel's compliance documents directly in the dashboard. These include attestations like SOC 2 Type 2, security policies, and other security documents that are available through the Trust Center. You can select a single document, an entire attestation, or multiple documents, and download them together as a single zip archive. Every download and preview is watermarked with your user and team information. Some entries link out to external resources instead, such as an auditor's public certificate directory. The Trust Center remains available for additional security information. Vercel's compliance documents are available on Pro and Enterprise plans. Learn more in the compliance documentation. Read more ## Name that Ware, July 2026 DevFeed: [Name that Ware, July 2026]() Original publisher: [Read original article]() Author: bunnie Published: 2026-07-30T14:52:35Z Content type: opinion Language: en Sources: [bunnie's blog]() Topics: [SOC](), [structure]() Tags: [2026](), [image](), [name-that-ware](), [soc](), [structure]() ### AI overview A July 2026 "Name that Ware" puzzle asks readers to identify a conserved design pattern in the lower-left area of a die-shot excerpt from an SoC and explain why the structures are organized that way. The document does not provide the answer. ### Source excerpt The Ware for July 2026 is shown below. I've got silicon on the brain, so I'm going to give a die shot another go at name that ware. Hopefully this one is a bit easier than the last one. This excerpt is a design pattern I look for and find on almost every SoC. It's [...] ## AMD Instinct MI455X GPU Detailed for Rack-Scale AI Deployments DevFeed: [AMD Instinct MI455X GPU Detailed for Rack-Scale AI Deployments]() Original publisher: [Read original article]() Author: George Cozma Published: 2026-07-23T17:37:10Z Content type: article Language: en Sources: [Chips and Cheese]() Topics: [GPU](), [Artificial Intelligence](), [networking](), [NVLink](), [systems](), [Ethernet](), [SOC](), [tsmc]() Tags: [2026](), [ai](), [architecture](), [article](), [capacity](), [communication](), [compute](), [ethernet](), [gpu](), [memory](), [networking](), [performance](), [processors](), [scale](), [soc](), [tsmc]() ### AI overview The article examines AMD's Instinct MI455X, a CDNA5 GPU designed for rack-scale AI deployments. It describes the Helios rack-scale system, UALink over Ethernet networking, compute and memory specifications, and changes to the WGP, register-file, and matrix-unit designs. ### Source excerpt Editor's Note (7/25/2026): The article has been edited with more information about the L2 behavior along with the bandwidth of the die to die interface. ## How to Govern Autonomous Agents in Enterprise AI Factories DevFeed: [How to Govern Autonomous Agents in Enterprise AI Factories]() Original publisher: [Read original article]() Author: Michelle Horton Published: 2026-06-29T15:50:13Z Content type: tutorial Language: en Sources: [NVIDIA Developer](), [NVIDIA Technical Blog]() Topics: [Artificial Intelligence](), [AI Factory](), [systems](), [vulnerability management](), [configuration](), [Network](), [SOC](), [ide](), [browser](), [Terminal]() Tags: [agentic-ai-generative-ai](), [agents](), [ai](), [ai-agent](), [ai-factory](), [architecture](), [autonomous](), [autonomous-agents](), [browser](), [data-center-cloud](), [enterprise](), [featured](), [ide](), [mlops](), [network](), [openshell](), [policy](), [soc](), [telemetry](), [vulnerability-management]() ### AI overview This tutorial presents NVIDIA's Secure Agent Workspace Reference Design for governing autonomous AI agents in enterprise environments. It explains how to separate the presentation layer from managed agent execution and enforce identity, network access, credentials, runtime policy, auditing, human review, and workspace isolation. ### Source excerpt AI agents are quickly moving beyond chat. They inspect code, run tests, read documents, search knowledge bases, query internal systems, and operate for hours on... ## Кто выпустил гончую. Ищем следы коллекторов BloodHound в логах Windows DevFeed: [Кто выпустил гончую. Ищем следы коллекторов BloodHound в логах Windows]() Original publisher: [Read original article]() Author: StepVolg ("Лаборатория Касперского") Published: 2026-04-24T12:37:53Z Content type: tutorial Language: ru Sources: ["Лаборатория Касперского" RU]() Topics: [Endpoint Security & XDR](), [Windows](), [SOC]() Tags: [active-directory](), [bloodhound](), [enumerate](), [red-teaming](), [sharphound](), [siem](), [soc](), [windows](), [windows-1ad1db2b7e3a]() ### AI overview The article examines traces left by BloodHound collectors in Windows logs and discusses detecting Active Directory reconnaissance activity. ### Source excerpt Служба каталогов Active Directory остается одной из самых популярных целей как среди злоумышленников, так и среди специалистов по Red Teaming и пентестеров. С выходом новых версий операционных систем семейства Windows продолжают появляться новые векторы атак на AD, например атаки на Delegated Managed Service Accounts (dMSA) в 2025-м. В ходе каждой атаки есть этап сбора информации, обнаружение которого является более сложной задачей, чем кажется на первый взгляд. Согласно аналитическому отчету нашего сервиса MDR за 2025 год в целом обнаружение данного этапа атак затруднено из-за большого количества ложных срабатываний, что снижает качество обнаружения и уменьшает вероятность предотвращения атаки, особенно в больших инфраструктурах с тысячами активов. Меня зовут Степан Ляхов, я работаю старшим инженером SOC в "Лаборатории Касперского". В этой статье я хочу рассмотреть один из самых популярных инструментов для сбора информации о домене Active Directory, разобрать, какие следы он оставляет в журналах и как обнаружить его активность. Читать далее ## Introduction to the PineTime Pro DevFeed: [Introduction to the PineTime Pro]() Original publisher: [Read original article]() Published: 2026-03-28T00:00:00Z Content type: article Language: en Sources: [Community blog on PINE64]() Topics: [Hardware](), [Microcontroller](), [SOC](), [Bluetooth](), [Embedded Software Dev](), [Development]() Tags: [bluetooth](), [embedded](), [firmware](), [fosdem](), [hardware](), [mcu](), [pinetime](), [pinetime-pro](), [psram](), [soc]() ### AI overview Pine64 introduces the PineTime Pro, a more powerful sibling to the original PineTime rather than a replacement. The prototype features a dual-core Cortex-M33 SoC, Bluetooth 5.2, expanded memory, an AMOLED touchscreen, GPS, health sensors, and other upgraded hardware. ### Source excerpt Table of contents Introducing the PineTime Pro Why "Pro" and not "PineTime 2" What makes it "Pro" A long road to get here Recent progress What about software? What happens next? Do you have something to share? Contact Community PineStore Introducing the PineTime Pro The PineTime Pro was officially announced at FOSDEM26 on the Pine64 stand. The demo was a bit modest (more on that later on), but we were delighted to showcase the first prototype of the "next generation PineTime" along with a demo running on a development board! We also mentioned the PineTime Pro in the FOSDEM 2026 Update blog post. In this blog post, we would like to provide a more in-depth look at the PineTime Pro. Why "Pro" and not "PineTime 2" The PineTime project started in October 2019, that's more than 6 years ago! Needless to say, the PineTime has been a great success. The community has been very active in developing firmware for the device, companion apps, tools and more. And, according to PineStore, it sells very well. The reason the PineTime Pro isn't called the PineTime 2 is because it's not meant to replace the original PineTime. The original watch still has a lot going for it: it is simple, hackable, efficient and already supported by great community projects like InfiniTime and WaspOS. It will continue production alongside this new model. The PineTime Pro should be seen as a more powerful, more feature-rich sibling rather than a direct successor. If the original PineTime is a solid open smartwatch platform, the PineTime Pro is our attempt to push that idea much further with new and improved components. What makes it "Pro" Compared to the "OG" PineTime, the PineTime Pro brings a significant hardware upgrade. At its core is a dual-core Cortex-M33 SoC, with one application core running at up to 200 MHz and a dedicated Bluetooth core. It also comes with 800 KB of internal SRAM and 8 MB of PSRAM. Around that MCU, the hardware currently includes: Bluetooth 5.2 - Classic (BR/EDR) & Low Energy A ## Automating SOC workflows with 1Password Enterprise Password Manager DevFeed: [Automating SOC workflows with 1Password Enterprise Password Manager]() Original publisher: [Read original article]() Author: info@1password.com (Clarence Wong) Published: 2026-03-17T00:00:00Z Content type: release Language: en Sources: [Blog on 1Password Blog]() Topics: [SOC](), [API](), [Automation](), [OAuth 2.0](), [Authorization](), [Security](), [Authentication]() Tags: [api](), [apis](), [authentication](), [automation](), [building-1password](), [compliance](), [developers](), [integrations](), [oauth](), [security](), [security-operations-center](), [soc](), [workflows]() ### AI overview 1Password announces the public preview of its Users API for Partners and new security automation integrations for Enterprise Password Manager. The capabilities let SOC teams programmatically suspend or restore users when risk is detected, using OAuth 2.0 authentication and delegated, scoped authorization within coordinated security workflows. ### Source excerpt Introducing our Users API for Partners in public preview and new Security Automation integrations that enable SOC teams to execute programmatic user actions within automated workflows in 1Password Enterprise Password Manager. Modern security teams increasingly rely on integrated security operations center (SOC) workflows that correlate signals and alerts, while orchestrating detection responses in real time. Behind every alert is an identity: a person, a service account, an API key, or an AI agent. However, when remediation requires manual steps, investigation and response slows, increasing security risks. Organizations are also expected to maintain continuous compliance via clearly enforced access controls and auditable processes. Today, 1Password is expanding the 1Password Enterprise Password Manager (EPM) through the public preview of the Users API for Partners, enabling security teams to respond to incidents faster during active security events. Powered by the Users API for Partners, security automation integrations with partners like CrowdStrike, in addition to BlinkOps, Elastic, Sumo Logic, Tines, and Torq enable mutual customers to automatically suspend or restore users in EPM when risk is detected. Together, these capabilities embed identity actions programmatically into coordinated SOC workflows. Moving from visibility to response with the Users API for Partners The Users API for Partners, now in public preview, enables execution of user-related actions within 1Password EPM. The API uses OAuth 2.0-based authentication designed for secure, enterprise-grade security. This enables ecosystem partners to build integrations for 1Password Enterprise Password Manager and use delegated, scoped authorization to list users, suspend access when risk is detected, and restore access after remediation. We're also introducing api.1Password.com as the single access point to 1Password APIs, accessible to ecosystem partners looking to build solutions with 1Password. The Users ## Bringing Robotics AI to Embedded Platforms: Dataset Recording, VLA Fine-Tuning, and On-Device Optimizations DevFeed: [Bringing Robotics AI to Embedded Platforms: Dataset Recording, VLA Fine-Tuning, and On-Device Optimizations]() Original publisher: [Read original article]() Author: Gaetan Bahl; Enzo Ruedas; Tess Boivin Published: 2026-03-05T14:16:49Z Content type: tutorial Language: en Sources: [Hugging Face - Blog]() Topics: [Robotics](), [Fine-tuning](), [multimodal](), [Artificial Intelligence](), [datasets](), [Latency](), [systems](), [AI Inference](), [SOC](), [data](), [Hardware](), [smolvla]() Tags: [ai](), [best-practices](), [compression](), [compute](), [data](), [datasets](), [embedded](), [engineering](), [fine-tuning](), [hardware](), [inference](), [latency](), [models](), [on-device](), [performance](), [real-time](), [robotics](), [smolvla](), [soc](), [systems-engineering]() ### AI overview A practical guide to deploying Vision-Language-Action models on embedded robotic platforms. It covers reliable dataset recording, fine-tuning ACT and SmolVLA policies, asynchronous inference, latency-aware scheduling, and real-time optimization on the NXP i.MX 95 SoC. ### Source excerpt Bringing Robotics AI to Embedded Platforms: Dataset Recording, VLA Fine-Tuning, and On-Device Optimizations Authors: Enzo Ruedas, Tess Boivin Recent advances in Large Language Models have enabled the transition from text-only reasoning to multimodal systems. First, with the integration of visual perception in Vision-Language Models (VLMs), and more recently with the generation of robot actions in Vision-Language-Action (VLA) models. [Next page]()