# westmere

Westmere is Intel's codename for a family of 32nm processors combining the Nehalem microarchitecture with integrated graphics capability.

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## AES support in Westmere

DevFeed: [AES support in Westmere](<https://devfeed.tech/articles/aes-support-in-westmere-38913.md>)

Original publisher: [Read original article](<https://idea.popcount.org/2012-09-24-aes-support-in-westmere>)

Author: Marek

Published: 2012-09-23T22:00:00Z

Content type: tutorial

Language: en

Sources: [Marek Majkowski](<https://devfeed.tech/sources/marek-majkowski.md>)

Topics: [westmere](<https://devfeed.tech/topics/westmere.md>), [Assembly](<https://devfeed.tech/topics/assembly.md>), [cpu](<https://devfeed.tech/topics/cpu.md>), [Cryptography](<https://devfeed.tech/topics/cryptography.md>), [Encryption](<https://devfeed.tech/topics/encryption.md>), [intel](<https://devfeed.tech/topics/intel.md>), [x86](<https://devfeed.tech/topics/x86.md>)

Tags: [assembly](<https://devfeed.tech/tags/assembly.md>), [c](<https://devfeed.tech/tags/c.md>), [cpu](<https://devfeed.tech/tags/cpu.md>), [crypto](<https://devfeed.tech/tags/crypto.md>), [encryption](<https://devfeed.tech/tags/encryption.md>), [intel](<https://devfeed.tech/tags/intel.md>), [westmere](<https://devfeed.tech/tags/westmere.md>), [x86](<https://devfeed.tech/tags/x86.md>), [x86-64](<https://devfeed.tech/tags/x86-64.md>)

### AI overview

This tutorial explores AES-NI support in Intel's Westmere architecture and implements a simple AES-128 CTR stream cipher using x86-64 assembly. It also discusses performance limitations and cautions readers to review the code before reuse.

### Source excerpt

AES support in Westmere In one of the lectures on the crypto-class professor Dan Boneh mentioned that the Intel's Westmere architecture has native instructions aiding with the AES cipher. Or formally speaking - newer CPU's support AES-NI instruction set. I decided to play with this instructions for a while and implement a simple AES-128 CTR stream cipher. I'm not experienced in writing assembly I mostly derived the code from the file from linux kernel.